A CPU, or Central Processing Unit, is the heart of any digital computer.

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How do I build a simple stack using logisim that can push and pop as needed [closed]

So, when my professor was explaining stacks to us, it seemed easy enough until I tried to do it myself. So all I need is a stack pointer(which is my register) and it'll show you what is on the stack ...
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43 views

PCI-Express Processor/Co-processor cards [closed]

I am hoping someone might be able to help: In the days when I started with computing (C64 and later Amigas) expansion slot cards with co-processing ability were relatively common. I am looking for ...
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3answers
184 views

Why is L1 cache faster than L2 cache?

I'm trying to understand why certain CPU cache memories are faster than others. When comparing cache memory to something like main memory, there are differences in memory type (SRAM vs DRAM), and ...
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1answer
69 views

Hardware accelleration for Python dict?

I wondered if it were possible to accelerate in hardware the Python dict? Dicts are mappings between a key and value that form a large part of the backbone of how Python works. Everything is an ...
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1answer
49 views

how the CPU start by execution stored in motherboards flash memory chip [closed]

I had read that at start, the CPU program counter register is fill with F000. I though that: PC registers contain the next instruction address. This address is send to the address bus and value ...
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71 views

How does a GPU/CPU communicate with a standard display output? (hdmi/dvi/etc) [closed]

I am interested in how the cpu/gpu presents (to whatever equipment that it does) video data after it has been processed. I have been told that the video is processed by the cpu/gpu and then sent to an ...
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1answer
41 views

Dynamic energy and dynamic power in microprocessors

In a class I'm learning about dynamic energy and dynamic power and the notes seem to be incomplete. ...
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83 views

Programming with ARM without microcontroller context [closed]

I want to make an application that will use ARM CPU. Am I bound to using microcontrollers? The thing is the microcontrollers that have ARM as a base are really big in physical size. Can I create a ...
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3answers
2k views

How can an FPGA outperform a CPU

I hear of people using FPGAs to improve performance of systems that do things like bit-coin mining, electronic trading, and protein folding. How can an FPGA compete with a CPU on performance when ...
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1answer
60 views

Combining CPU and RAM on stacked silicon

Xilinx developed a way to combine multiple dies in a single package by using a silicon interposer (I don't know whether they're actually are the first ones to do this). This way, they achieve huge ...
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2answers
76 views

How many electrons does it take to switch on a transistor [closed]

How many electrons does it take to switch on a transistor, I read somewhere that Inel had made some electrical "paths" so small that they can allow only individual electrons to flow at a time, or ...
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1answer
58 views

CISC, microcode execution flow

Say we have 16 bit processor and such CISC instruction: 0001 0010 0100 1000 As far as I understood from the answer on related question In the process of decoding, this CISC instruction will be ...
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1answer
145 views

ARM9 vs ARM11 performance? [closed]

This may be a loaded question, but is there a general understanding of the performance increase per clock between ARM9 and ARM11? Say, for a math-heavy function (FFT)? Thanks!
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2answers
80 views

Xbee not responding timely. Large delay between each transmission

I have prepared a setup for 2 Xbees one connected to the PC via XCTU and the other interfaced with Atmega 168. The terminal software will send 1 and the xbee with Atmega 168 will return 1. The code ...
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2answers
79 views

What happens when the same interrupt is caused during an ISR? [closed]

To handle an interrupt the processor jumps to an interrupt service routine (ISR). If this ISR generates the same interrupt then this can result in: a) program error b) hardware error c) stack ...
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1answer
139 views

What is the fastest logic gate?

I have been told that the fastest logic gate family is ECL. My first question: Is this true? In this or another family (Depending on the answer to the above question), Is there any particular gate ...
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1answer
60 views

What is the Global Descriptor Table memory type?

What type of memory type is used for the Global Descriptor Table in an Intel Core 2 CPU? Is it just EEPROM or does the CPU normally use another type of NVRAM?
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2answers
91 views

How interrupts handle does work on a physical layer

I want to understand how HW IRQ does work on a physical layer. I ask my question considering a specific example. As known after a packet coming to a network adapter a hardware interrupt is signalling. ...
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1answer
161 views

Why does capacitor charge slowly but discharge quickly?

I've designed this circuit using Multism 10.1 : This circuit is part of clock generator for 8088 uP: Why does the wave of ch1 of Oscilloscope which represent the voltage across the capacitor take ...
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2answers
162 views

What is the function of the capacitor and the diode here?

This photo: is taken from the book: The Intel Microprocessor Family: Hardware and Software Principles and Applications, page 298. This is a 8284 (clock generator) for the 8088 microprocessor. What ...
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3answers
138 views

Why the frequency of single-core CPUs has stopped increasing? [duplicate]

I wonder why CPU vendors stopped producing CPU with frequencies above 3.0 - 3.6 Ghz and switched to using multi-core CPUs? What was the reason behind this step? Was there a physical constraint or the ...
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1answer
123 views

Building a simple PC - looking for a CPU [closed]

I would like to build a computer. It is a child's dream that I had and now that I am at college, I finally gain the knowledge I need. I want it to be simple. I admire the early designs of 1990's ...
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2answers
121 views

How to avoid input/output conflicts with a bus

How does a system bus work? I don't understand how can a circuit avoid input/output issues with a bus. I included an image to better explain my thinking. The circuit has 2 general purpose ...
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1answer
191 views

Is the speed of light the upper bound on CPU speed? [closed]

Edit: As this my first question in this site I was a bit confused how to pose the question. Because of the way I had put the question before has made it trouble to understand What is the fastest ...
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1answer
105 views

What software to graphically design a simple schematic? [duplicate]

I need to draw a schematic similar to that shown in the figure attached in this question. Are there softwares that allow to graphically design a schematic like that?
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93 views

Doubts in two level cache system

A computer system has an L1 cache, an L2 cache, and a main memory unity connected as shown below. The block size in L1 cache is 4 words. The block size in L2 cache is 16 words. The memory access times ...
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113 views

minimum clock cycles needed?

The instruction call Rn,sub is a two word instruction.Assuming that PC is incremented during the fetch cycle of the first word of the instruction,its resister transfer operation is ...
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2answers
147 views

Why vectored interrupts are not possible?

vectored interrupts are not possible if a cpu has single interrupt request line and single interrupt grant line while multiple interrupting devices are possible . Is the above statement is correct ...
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5answers
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How does register type modifier work on different CPU architectures?

This question is to clarify my doubt against this register storage class. when a variable is register qualified ,compiler puts the variable in a cpu register other than RAM for ease of access. so ...
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2answers
167 views

How are registers implemented in microprocessors?

A register is a temporary storage facility within the CPU that holds data for computation purposes. What I question is how this is structured via engineering principles within the circuity: 1.I had ...
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1answer
124 views

Motherboard with separate circuitry for PCIe, CPU, RAM etc [closed]

I asked this question on another forum (http://www.tomshardware.com/answers/id-1812014/motherboard-separate-circuitry-pcie-cpu-ram.html) but nobody replied yet so posting it here I am looking for an ...
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603 views

AMD/Intel CPU Yield/Failure Rate

This question is based on another question submitted here: Is it possible to make illegal clones of an Intel Core i7? More specifically, it's based around this quote: I've been led to believe ...
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2answers
298 views

Where does all the power consumed by a CPU go?

Where does all the power consumption of a CPU go? Does all the power drawn by the PC's CPU get transformed into heat? Or does it get transformed into part heat and part some other kind of energy?
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229 views

Any simplified diagram explanation of how CPU works? [duplicate]

I'm a high level Java developer. My major is Information Systems. However, my internship subject is in embedded systems programming by C, about which I have no idea. Trying to study about it, I ...
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1answer
275 views

CPU Soft core on FPGA

I need advice here. One of my mid term hobby projects is to build an instruction set emulator of popular ISAs (e.g. ARM7) on a FPGA device. A lot of people have done this before. My requirements are ...
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292 views

Instructing the Program Counter (PC) to increment [closed]

I am building an 8bit computer from TTL, in regards to the Program Counter, sometimes I may not want it to increment on each clock pulse, with that in mind, how would I instruct it to increment? The ...
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167 views

What can cause CPU Vcore to jump up by 20% permanently without corresponding change in CPU load?

One of my servers shows strange change in its monitored parameters. Last Sunday evening one of voltage measures ( in0 which I think is Vcore) suddenly increased by 20% from ~1V to ~1.20V on average. ...
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211 views

Is the registry file made from SRAM?

I study computer engineering and I read Hennessy's book about Computer Organization where it's described how the microprocessor does pipelining and that the microproceossor has on-chip cache, as much ...
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1answer
168 views

Is there such a thing as a circuit that outputs 1 if the input is high-impedance, and 0 otherwise?

I am trying to design a circuit that outputs a logical 1 if the input is high-impedance, and a 0 otherwise. Any idea how I might implement this? I would prefer to use off-the-shelf parts (no ...
6
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1answer
263 views

How does multi-core CPU implement asynchronous coordination?

I am coming from computer science background and wanting to study process calculus for use in asynchronous circuit design. So, I am looking around the current practice on asynchronous circuits. There ...
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2answers
125 views

External CPU design

Apologies if this is a dumb question. I don't have any training in electrical engineering, so I can't gauge for myself how ridiculous this sounds. Would it be possible to modify a commercial CPU so ...
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195 views

Why is the CPU hot when it's turned on? [closed]

Why is the CPU hot when it's turned on?
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2answers
308 views

32 bit, 4 way multiplexer

I'm relatively new to electronics and recently decided to design and build a very simple CPU as a personal project. My instruction size is 32 bits and I want to have 32 bit registers so I am going to ...
14
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2answers
654 views

How did handheld video games from the 70's and 80's work?

I'm curious about how the early handheld video games from the 70's and 80's worked. You know, those small games with a LCD display with "fixed elements" meaning it was hard wired for one (or a small ...
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1answer
87 views

What's the difference between delayed branch and branch prediction?

I'm studying how delayed branch works and I'm trying to distinguish delayed branch from branch prediction. What is the difference? Is delayed branch a means to facilitate a control hazard?
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1answer
114 views

Is it possible to build a CPU from content-addressable memory?

Every modern programming language use objects and not C/C++ style struct/class. In C/C++ every data member has a size, so addressing a struct member is basically a memory address + offset. But script ...
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1answer
51 views

How to calculate the address fields for a cache?

I've a homework question about 32-bit cache memories: For a cache memory that has size 16kB (16384 byte) and blocksize 2 words, state the names and the sizes of each field of the address that ...
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2answers
160 views

What is the meaning of “Register.Rd”?

Reading Hennesy's book "Computer Organization and Design" it is mentioned "Register.Rd" and "Register.Rs" but what does it mean? The .Rd, .Rt and .Rs parts I can't understand, on page 365:
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Understanding branch prediction

On page 376 of Hennesay's book Computer Organization And Design, the following illustration is listed to illustrate branch prediction. But what do "IM" and "DM" mean? Does IM stand for instruction ...
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2answers
173 views

Implementing multiplication

I'm trying to implement multiplication in a cpu I designed. I'm trying to achieve this with some conditions. I only two general purpose registers Rx and Ry and these instructions: Add Rx, Ry ...