Tagged Questions

Digital electronics use a finite number of states, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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7
votes
8answers
618 views

Is there any way to use half-bits?

As most people here know, by using 4 bits, we are able to count from 0 to 15 (0123456789ABCDEF in hexadecimal). But if we were to only count up to 9, we would still be using 4 bits, and the digits ...
0
votes
0answers
25 views

How to implement a pipelined integer divider

I need to implement a pipelined integer divider for my 64-bit microprocessor. I have tried reading up on this, but I am still confused. Any advice would be appreciated.
2
votes
6answers
135 views

How to implement an 8-bit CPU?

I'm trying to create a CPU, using 8-bit instructions, and there will be 9 or 10 of them. I have an add, subtract, multiply, load, store, branch if zero, branch if not zero, print (to display), input ...
2
votes
2answers
94 views

Lots of thermistors but no readout

Back in Sep '12, Olin Lathrop answered a similar question about wiring a digital display to a thermistor, but my situation is slightly different from Jim McDerby's. I too have solar thermal panels ...
1
vote
2answers
47 views

How to Design D flip flop using T flip flop?

I don't know how to convert flip flops to each other but i know with any flip flop you can make all other flip flops.Please help me to how design it with specific way and explain step by step.Are ...
-8
votes
0answers
42 views

VHDL code of johnson counter [on hold]

For every 11th clock pulse the output goes high , so design it using a johnson counter . Also write the VHDL code ?
0
votes
1answer
22 views

How to calculate logic gates power in microwatts in Matlab?

I am designing a circuit in Matlab2014 Simulink using logic gates and I am giving Pulse and Constant at the input of the circuit but I cannot measure current and voltage at the output of the circuit. ...
1
vote
0answers
32 views

Digital to analoge voltage regulator

I am a complete beginner on electronics. I am trying to make device to control the voltage output according to a digital input. So basically what I need to make is to continuously increase the ...
3
votes
2answers
243 views

Why is shift register very important?

I learned about shift registers a few weeks ago but I don't know why it is very important and everyone said that it is necessary for microcontroller, etc. Please make sense for me.
2
votes
1answer
62 views

Is there relation between logic chip names and their internal structure

I know that for instance an ATMega328 is a 8 bit MCU with 32k of program space, the same can be said for most other MCUs and some other ICs with a direct relation between the name and internal specs. ...
0
votes
0answers
45 views

Arduino Output to 24V logic

We are testing out some analog sensors, and we need to send a 24V trigger (maximum 15mA) to a PLC from an arduino. I have seen some designs using a MOSFET to make a bidirectional logic converter, but ...
0
votes
1answer
60 views

Transistor count in NAND or NOR implementation of boolean algebra?

I have a complex output function in boolean algebra ( Where '~' means NOT): F=~( (a c ~d) + (a ~c ~d) + (~a c) + (~ a c d) + (a c ! d b) ) I know this can be simplified down to: F = (~a ~c) + (a d) ...
0
votes
1answer
49 views

What are “consecutive input pulses”?

I am stuck on a homework problem that I have difficult time understanding: Draw the state diagram of the circuit described below, with detailed explanations: A detection circuit has two ...
1
vote
2answers
116 views

Constructing decoder 5/32 using smaller ones, without enable

I need to construct a decoder 5/32 using any number of 2/4 and 3/8. How do I start? With Enable it's not hard to figure out, but without them it gets complicated. Advice?
0
votes
0answers
56 views

Which logic gate arrangement would be better?

I have converted an old ATX PSU to a portable power supply for traveling as it is reasonably small. To go with it I will also make up a visual indication as to the state of the PSU once on, this is to ...
5
votes
3answers
358 views

IC takes no input (or high) as high and low input as low on breadboard

I was working with IC 7400 (or LM74LS00 / NAND) (and IC 7486 - XOR) to design and verify combination circuits and logic gates. Consider the lower end of breadboard as LOW (connected to GROUND) and ...
-3
votes
2answers
41 views

Code of ripple carry adder with clock in verilog [closed]

I want to ask how to write a Verilog code for 4bit ripple carry adder with a clock as input. Also I would like to know how can I add a flip-flop to each port (such as the flip-flop connected to ...
1
vote
1answer
71 views

Finding Critical Path of Combinational Logic

I have a combinational circuit and I would like to find its critical path in design compiler. Essentially, I want to find out by how much the combinational logic will reduce the maximum clock ...
0
votes
0answers
39 views

How can I connect this ram-ish memory layout

In the picture on the web, I want to connect the two inverters that are ringing around each other, I want to connect them to the data-line. I can't seem to figure out how to properly connect them in ...
-1
votes
0answers
44 views

Designing a 4 bot non binary Synchronous up down counter using a 4 bit binary counter (MOD 14)

The following Image is the "design" of the counter I need to make, I should only need a few extra simple gates in order to achieve a 4 bit Synchronous down counter that is NOT binary. So far I've ...
1
vote
2answers
72 views

How can I add sounds to my logic probe?

I am a beginner at electronics and I want to build a simple logic probe for TTL circuits. I found this diagram online: Which does exactly what I want. However, I would like to make it play a high ...
1
vote
1answer
48 views

What does a double array do?

While looking through some Verilog code, I came across this: input [7:0] data [0:16] The code referred to this as memory. Could someone explain what it does? I ...
0
votes
1answer
39 views

Howto convert “0=floating / 1=Vcc” to CMOS compatible “0=ground / 1=Vcc” signal

I'm playing around with CMOS logic using CD#### dip packages. As far I understand input pins should never be left floating, always connect them to Vcc or ground. Unfortunately my digital source ...
0
votes
0answers
44 views

Why TTL logic gates are faster when compared to CMOS logic gates? [duplicate]

In TTL families resistors are used and number of stages between input and output terminals is comparatively high. Still operation speed of TTL is better than CMOS. Why?
0
votes
2answers
101 views

What's the difference between a SRAM cell and a D-Latch?

They both seem identical - they both have an "enable" and a single input. When enable is high, the value stored in the element is set to the input. Are they functionally different in any way? (I know ...
1
vote
1answer
51 views

How can I read in an image in Verilog?

I have a .mif image that I want to encrypt in Verilog. To do so, I need to read the image into the program and store it in an array. The image would be 160 by 120 and I would like to store it in an ...
0
votes
1answer
41 views

FSM for predesignated process (How to draw the state diagram)

let me start by saying this involves some homework problems so if you could help guide me a bit I would greatly appreciate it. I have been working with finite state machines for a bit in my course ...
0
votes
0answers
72 views

Design a Mealy FSM that functions as a sequence detector, generating two outputs y, z in the following way:

Initially both inputs are set to 0. Output y is set to 1 when the sequence "10" has been applied to the input x; output y should then be reset to 0 and y should continue detecting next occurrence of ...
0
votes
2answers
66 views

How does Decimal Mode in an ALU work?

Trying to wrap my head around the basic of how to do decimal addition in an ALU. Here is what I have so far. I am primarily looking at the MOS 6502 CPU architecture. It has two modes in which you ...
0
votes
0answers
37 views

Parallel-in, parallel-out, universal shift register

I am trying build circuit of parallel-in/parallel-out universal shift register. I have found circuit in the Internet. Here it is I have tried to do this using MicroCap , but it doesn't work as ...
0
votes
1answer
31 views

Modelling priority/importance in a digital circuit

I'm attempting to create a digital circuit that has three inputs representing binary numbers. For example 001 would equal 1 in decimal , 011 would equal 3 and 111 would equal 7. So overall the highest ...
1
vote
2answers
322 views

How do you do operations on large numbers using a small fixed-width ALU?

I am wanting to design a simple calculator like what you would find in the dollar store. Something like this: This little guy can display a number 8 digits long, meaning 99999999 is the largest ...
0
votes
0answers
48 views

4:2 compressors gate count increasing but area decreasing, How?

From literature's I got below definition, ...
0
votes
1answer
42 views

Truth Table for JK flip-flop circuit?

Given a JK flip-flop circuit (using a D flip flop with a 2 by 1 MUX) how can I derive a truth table from this circuit? D = JQ' + K'Q Note: This is NOT a homework question. I just simply want to ...
1
vote
1answer
97 views

Need help with a R-2R DAC Circuit

I am trying to simulate a 4-bit DAC circuit using a R-2R resistor ladder. I am using a 741 op-amp. I selected the R value as 10k and calculated the value of Rf using the equation given on this page - ...
1
vote
3answers
341 views

NAND gate that outputs 0 when all inputs are 0

I'm trying to work out a piece of binary logic and this is essentially what I am trying to achieve: ...
0
votes
1answer
85 views

Parallel MAC unit based on modified booth algorithm

The below diagram is the parallel MAC structure. In parallel MAC both partial product addition and accumulation take place at same time. The partial product summation + accumulation unit of above ...
0
votes
0answers
44 views

Using explicit registers in RTL designs

Is it a good practice to use explicit register IPs in RTL designs? For instance, having separate IPs for each type of register and instantiating them in the design instead of coding them on-the-fly. ...
4
votes
2answers
160 views

How does someone initially design a digital system for HDL?

So I have really been hitting the example code hard this week in an attempt to better understand some HDL design basics, specifically FPGAs with VHDL. The book I am using (if anyone is interested) is ...
0
votes
0answers
29 views

Help with harder version of carry chain adder?

I am designing an addr circuit given cin = 0, given a nand of the operands i want to add, their xor, and nor. I have drawn it in a software but i am not getting the right output, i have tried to ...
0
votes
3answers
77 views

Does it take long to implement RSA in hardware?

I just finished my first Digital Hardware course. We covered combinational circuits, sequential circuits and FSMs. We now need to create a final design project. We have 2 weeks to do so and we work ...
0
votes
1answer
215 views

Remainder of a 16-bit number divided by 3

I have to design a combinational logic circuit which accepts a 16-bit number as input and then calculates the remainder of the number divided by 3 as its output. I originally had no idea how to ...
0
votes
2answers
75 views

Is possible to use wave guide to decrease beam width?

If I use a normal 1/4 monopole antenna "30 MHz for example" and cover it with metallic wave guide has a narrow beam width, should the gain increasing according to this formula below? $$G = 10 \; log ...
0
votes
0answers
50 views

AND gate mysteriously and ludicrously slow

I've made a 3 input AND gate from 4 NANDs in order to daisy-chain 3 motor drivers jrk 21v3 and get the current value out of them. The problem is, the command is sent OK, the driver responds OK with ...
2
votes
6answers
310 views

Are all sequential circuits based on cross-coupled NAND or NOR gates?

So far, all the sequential circuits I see in the textbook use cross-coupled NAND or NOR gates. Is it possible to design a sequential circuit without them?
1
vote
0answers
45 views

Designing 1-to-2 demultiplexing circuit with a custom truth table

I'm trying to build a circuit with following truth table with CMOS logic. Pins are: I and A are inputs ...
0
votes
1answer
71 views

How to reduce an ALU logic with the minimum logic possible? Its very challenging

Our professor wants us to reduce 8 function alu (8 outputs) to a 4 out ALU that has capability to implement all the 8 functions. We can use any gates(even aoi's), muxes, and can create our control ...
0
votes
1answer
36 views

How should this code look like in verilog?

I am designing an ALU to add at state 000, I have to assign control signals for a mux, carry in, and operands so that it works. so, i wrote an if statement in the controller module, and the TA told me ...
2
votes
0answers
54 views

What could this PLA be doing?

The picture below shows a PLA, I have done part (a) and found out that; F0 = A0 xor B0 F1 = A0B0 + (A0' + B0')(A1 xor B1) F2 = A0B0(A1 + B1) + A1B1 What may this circuit be doing, I can't see a ...
0
votes
3answers
78 views

Breadboard with high frequency digital signals

I'm trying to interface an ADC chip with my FPGA. The ADC is on a breakout board that fits nicely into my breadboard (.1" pin spacing). The clock input from my FPGA into the breakout board is 12.5 ...