Digital electronics use a finite number of states, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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Circuit that takes a 7-bit binary number as input and generates its floating point representation

I want to design a circuit that takes a 7-bit binary number as input and generates its floating point representation, i.e. generates a 4-bit mantissa and 2-bit exponent so that the number can be ...
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1answer
29 views

Boolean Matrix and circuits

What are Boolean matrices? How can one represent Digital Circuits using them?Please see if the following link helps? http://comjnl.oxfordjournals.org/content/15/3/247.full.pdf
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1answer
49 views

Boolean Matrices and Transpose

How can one find the Transpose of a Boolean Matrix? Also how does one interpret the logical circuit represented by it.
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1answer
51 views

Floating a digital output pin of an IC

I'm using a FXLS8471Q accelerometer for a project using the SPI interface. The chip uses the same pins for SPI and I2C. To detect which interface the user desires, the chip samples the SA0 pin on ...
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0answers
24 views

how to define digital circuit (NAND-NOR-XOR) in matlab language? [on hold]

i have a problem in defining NAND gate in matlab language , how to define digital circuit consist of logic gates (AND-OR-XOR)in MATLAB?
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3answers
121 views

Why do 74 series IC's have two ENABLE pins

I am using 74LS154 4 to 16 decoder Link to *.pdf here. It has two ACTIVE LOW 'ENABLE' pins at the input. What is the use of two ENABLE input pins is the question. Most of the 74 series IC's used in ...
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3answers
132 views

Are 3-8 input NAND gates common?

If I have, for example, 4-8 (or more) inputs that I need to AND together (or even NAND or OR) should I look for larger input devices like the 7430 NAND or is common practice to daisy chain multiple ...
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3answers
114 views

Pull up resistor

I'm software, not hardware, and would ask our electronics guy, but he's away on a site visit. Someone on StackOverflow suggested I repost this here. I get the basic idea of a pull up resistor as ...
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2answers
76 views

Interfacing incompletely documented logic signal where resistor affects output voltage level

So I've got this marginally documented 12V logic signal from something I have to regard as a black box that I'd like to interface to a pi or arduino (i.e. c 3V). I have 3 lines - 0V, +12V and signal ...
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1answer
45 views

Determining results for the carry out and sum operations on 8-bit operands

The problems I'm trying to solve are these: Determine the values for the carry C8 C7 C6 C5 C4 C3 C2 C1, given ...
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3answers
51 views

Convert 910 to an 8 bit, two’s complement number

Convert 910 to an 8 bit, two’s complement number. 0000 1001 1111 0111 0100 1000 0001 0010 I convert 910 to binary (910)_10 = (0000001110001110)_2 but when I reverse 10001110 to 01110001 in ...
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2answers
668 views

Simplify a logic expression - Where have I gone wrong?

I am trying to simplify a logic expression but I think I simplified it too much. The expression is as follows: $$\overline{\overline{(A \cdot B)} \cdot C \cdot (\overline{A}+\overline{(B+C)})}$$ ...
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1answer
81 views

2 Transistor XOR Cell Floating Output Problem

I designed the following 2T XOR cell for my full adder purpose: Theoretically it gives correct output for all input combinations. But on Tanner Eda using 180nm technology 5V supply, it gives logic ...
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1answer
87 views

A circuit that can detect a zero after irregular intervals of ones

Suppose I have a circuit for which the input is coming from a line which carries variable length of ones (as junk data) then data (indication of start of data is a zero bit) and again a string of ...
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0answers
75 views

6 Transistor Full Adder

I am working on a 6 Transistor Full Adder whose circuit diagram is The circuit works fine but there is a problem: it needs a 25k resistor at XNOR and SUM point to show the complete Full Adder ...
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2answers
141 views

Simplify a logic expression

I need to simplify the following logic expression: $$\begin{array}{|c|c|c|c|c|} \hline A & B & C & X & SOP \\ \hline 0 & 0 & 0 & 0 & \\ \hline 0 & 0 & 1 & ...
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1answer
135 views

Making 2-input AND gate, 2-input OR gate and NOT gate using only the “SAND” gate

Suppose there is a special gate called a SAND gate (Single-inversion AND) that looks like this: How can I make 2-input AND gate, 2-input OR gate and NOT gate using only the SAND gate? The truth ...
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3answers
82 views

Simple NOR gate (transistor-level) diagram

My question here is simple: I cannot understand how the input flows throughout the circuit. I understand the P and N type transistors; I could see why if A and B are both 0, and pass through the ...
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1answer
65 views

Lower Voltage LED organ

I am interested in adapting this Jameco kit schematic to my own needs. I have run into an issue though. I am not sure how to lower the voltage requirements. This circuit is built for 12V, I would like ...
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1answer
100 views

Practicality of Logic Gates for a newcomer

For my project, I was thinking of making a password lock using logic circuits. I have a basic understanding of logic gates and have a few designs. However, I have very little experience in how to ...
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3answers
76 views

Double Li-ion charging circuit logic

I'm currently trying to adapt a single li-ion battery charger based on the TP4056 to work with charging more than one battery. The idea is to use a logic circuit that is controlled by the IC's "FULL" ...
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2answers
49 views

Signal-driven 3 output logic gate decoder or switch?

I need to build a simple logic gate circuit such that when a single input signal or switch goes low it alternately activates one of three outputs as high. That is, every time it goes low the currently ...
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2answers
46 views

Difference between LVPECL and PECL

I want to use a counter MC100EP016A which requires PECL clock input. What is the difference between LVPECL and PECL? If a clock source provides LVPECL clock how can I use it with the MC100EP016A ...
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3answers
449 views

Logic design to circuit — how is it generally done?

So I've designed this CPU with purely logical components (basic logic gates), now how would I go about converting it into a circuit? I know that logical gates can be implemented using transistors, but ...
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2answers
64 views

Why increase in resistance of register used in circuit show lesser average power dissipation

I am working on 6 transistor full adder circuit. Red marked resistors (25k) are used to show all pattern of full adder correctly. But it show wired behavior. When I increase resistance from 25k to ...
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2answers
149 views

Equivalent of IC4026

I have tried to make a reaction timer using IC 4026. But due to unavailability of IC 4026 I want to replace it. Can I use 4017 instead of 4026?
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1answer
93 views

Beep patterns generator

I would like to generate the following beep patterns using a piezo buzzer: Single long beep Two short beeps Single short beep Is there any specific chip I can ...
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53 views

How ALU Perform decrement operation using LOGIC Zero

I google many ALU Block diagram for decrement operation.all same as shown below. This 1 bit alu perform 8 operation depending upon select line status Theoretically all operation seems works ...
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1answer
31 views

Initial state of SN74AUP2G80 dual FF

My understanding is that a basic FF will in general power-up into a meta-stable state that then resolves to either H or L (more or less quickly). My question is, does this apply to current ...
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1answer
85 views

n-channel MOSFET source load alternative

I'm trying to drive some RBG leds using MOSFETS. Let's say I have 2 individually RBG LEDS, each controlled by 12V, with each R, B and G with its own output to GND. What I want to control, is to be ...
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2answers
93 views

What is the meaning of Vtt

I was looking at the data sheet of a counter IC and the connection circuit diagram showed two connections: Vbb and Vtt What do ...
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1answer
55 views

Single Die Roll Counter Wrap Around Nested Ternary Conditional

I have to emulate a single die roll, therefore it needs to wrap back to one at 6. `D1 and `D6 correspond to my 3-bit state ...
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1answer
32 views

Minimum cover for this K-MAP to find minimum SOP; which is better, and why?

I used this K-MAP to find the minimum sum-of-products expression for this collection of minterms. I see that minterm-one could also have been "covered" by grouping it with minterm-five. I opted to ...
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35 views

Trouble analyzing this JK-Flip-Flop (negative edge triggered) timing diagram

Can someone check to see if this timing diagram for a negative-edge-triggered flip-flop looks correct? I see that as it's negative-edge triggered (bubble at clock input), and thus action occurs at ...
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what is the approach to design edge triggered d flip flop? [closed]

i know the circuit. I implement it using verilog and it giving result correct. like when we have to design any digital circuit we draw truth table. Optimize circuit using K-map and then implement. In ...
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1answer
99 views

What is “Input high voltage common mode range?”

I am using a MC100EP016A IC which is an 8-bit synchronous binary up counter. According to the specifications of the IC, you could use either single ended or differential clock input for the counter. ...
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5answers
542 views

Very high speed counter (around 1.5 GHz to 2 GHz)

I am thinking of a device that can measure the distance of an object from a sensor using a radio transmitter and receiver pair. I'm thinking of using a counter at the sensor side, with a ...
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64 views

Very high speed counter (2GHZ) [duplicate]

I'm trying to build a high speed counter to measure the time delay between two radio waves . I'm thinking of using a MC100EP016A counter which works at a maximum frequency of 1.4 GHz but I cannot find ...
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26 views

Verilog Concatenation Setting LED'sin casex

If I have a casex statement and I have something such as {`idle, `left}: {next, LED} = {`state1 ,`turn1liteON }; and LED corresponds to LEDR[7:0] and ...
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2answers
89 views

Draw a finite state machine for a welding machine

I am trying to draw a fsm for a welding machine. So far I have the following table, which I think is right.. The system has three normal states: stopped, started, and welding. It will only transition ...
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2answers
228 views

Circuit to keep two LEDs on when buttons are released

I am trying for the first time to build something on my own. I am pretty n00b when it comes to electronic so, please, bear with me. I'm trying to build a "simple" schematic that goes like this: there ...
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1answer
83 views

Is it safe to use a bus buffer as level shifter?

I am currently using SN74ABT5402ADW as a buffer and level shifter for my ADC, however, the datasheet does not explicitly say that it can be used as a level shifter. I provide it with 5V power, but the ...
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5answers
837 views

Can an operational amplifier circuit be made entirely out of diode Nand and Nor gates?

I'm not sure whether this question has been asked before, but in researching my question, I came across this user's post (at If-else decision structure using op amps or any other non-programmable ...
2
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0answers
86 views

What is bit-true implementation

What is bit-true implementation (with an example if possible)? I was reading a paper and it was stated "a bit-true implementation of the algorithm on a FPGA was performed." So what exactly is ...
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3answers
99 views

Should I use CMOS vs. TTL?

Now, I know that this question has been asked so many times that it seems like I'm trolling, but I must point out that I couldn't find the right answer to this question anywhere. So yeah, CMOS and ...
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1answer
47 views

fpga verilog dual access

I need to write to a register from 2 sources.. in this case, a pci host and a microcontroller. The 2 will never access the register at the same time (basically once the PCI is done , it hands it ...
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1answer
50 views

Registers and Busses

I need to design a schematic for a register that has an input of clk and i[7:0] which is an 8 bit binary input interpreted as a number and an output of F which goes high if i was equal was to 127 base ...
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49 views

Can you calculate parasitic elements caused by using many breadboards?

Recently, I've had the idea of building a 4-bit CPU out of RTL (Resistor Transistor Logic). Because there are so many connections, I would prefer to build this project on many breadboards. I realized ...
2
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2answers
304 views

I/O series resistor

I've read that digital I/O pins should have a resistor in series in order to limit noise. Should one also use such approach when interfacing with the I/O pins of an arduino, or is that already done on ...
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1answer
56 views

Digital light organ

I am trying to make a circuit that takes an audio signal from an MP3 player and converts the signal into digital signals based on frequency. Audio In is the is the signal from the audio jack of an ...