Digital electronics use a finite number of states, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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2
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3answers
176 views

How does a transistor behave when the gate is disconnected?

On an n-type transistor, if a voltage above a certain threshold is applied to the gate, current can flow from source to drain. On a p-type transistor, if a voltage below a certain threshold is ...
4
votes
3answers
756 views

Can a NOT gate be used to achieve 180 degree phase shift? [on hold]

I have seen from various sources which say that a NOT gate cannot be used to achieve an 180-degree phase shift. Is this claim true?
0
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2answers
61 views

How do you convert a number to its 4-bit binary equivalent using logic gates?

Circuit storing number as binary ]2 My aim is to store numbers from 0-15(4 bits) as binary. The numbers are inputted using a keypad with buttons labelled N0-N9. The circuit works for single digit ...
0
votes
1answer
29 views

LED Sequence control using decoder/Simultaneous decoder channels

I'm working on a project that is used to monitor how many parts I have left in my cupboard of bits. There are 5 separate parts whose level I want to monitor, each part will have 3 LEDs to display the ...
0
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0answers
44 views

How to make QAM (quadrature amplitude modulation) of a square or sinc wave signal?

I found this discussion of QAM in a communications text book and internet. "...load it into Matlab using imread(), which will give you an array of ...
0
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1answer
27 views

Function of demultiplexers in Register File

What is the function of demultiplexers (DMX) in this Logisim diagram of a Register File design: Also could you explain the meaning of: dreg,sreg,treg dsel,ssel,tsel dwrite,swrite,twrite
0
votes
1answer
19 views

Noise margin calculation for schmitt and non-schmitt input signals

The noise margin is defined as: Noise Margin High = VOH - VIH Noise Margin Low = VIL - VOL Is the noise margin calculated the same way for schmitt and non-schmitt buffers? If so then why? This ...
0
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0answers
38 views

Determine chip area with equivalent gate metric

I got a question regarding slide 38 (Chip Spec & Measurement Results) of the following link: http://people.csail.mit.edu/emer/slides/2016.02.isscc.eyeriss.slides.pdf It states the following chip ...
-3
votes
0answers
21 views

Sipm photon counting

I m beginner in photodetection domain , so please cand any one explain to me how to counting number of photon using sipm because i find that the output signal of sipm is one signal wich is somme of ...
1
vote
3answers
113 views

LtSpice computation limitation: Which conditions do affect it?

I am trying to simulate a transistor level circuit in LtSpice. There are more than 200 transistors in the design and a few opamps. Mostly logic structures. The problem is that LtSpice can not solve ...
0
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0answers
33 views

Photo-interrupter filter and digitizing circuit

I am trying to design a circuit that can filter and digitize a photo interrupter signal. I have the signal from the photo-interrupter (3.3V/ground) connected to a low pass RC filter with resistor ...
0
votes
4answers
104 views

can a simple diode and resistor in series qualify as an inverter? [closed]

I'm working on a single-sided PCB and I find transistor pins are too close together for tracks to run through, so I'm wondering if I could roll off my own inverter by using the cathode of a diode as ...
1
vote
1answer
48 views

How to get a CMOS transistor SPICE model?

So far in order to simulate CMOS circuits I relied on a library that I had to randomly download from Internet such as this one: http://ecee.colorado.edu/~ecen4827/spice/ltspice/5827_035.lib Inside ...
0
votes
1answer
20 views

What is AO222 based design in concept of design of CMOS cell library?

I am reading a paper "Static Implementation of QDI Asynchronous Primitives" by P. Maurine, J.B. Rigaud, F. Bouesse, G. Sicard, and M. Renaudin. They designed a cell library using AO222 gate, What is ...
0
votes
0answers
35 views

What are the mathematical concepts involved in Ic design? [closed]

What are the mathematical concepts involved in IC design, i have studied fundamental of digital logic, but i need to know what are the problems faced in IC design like timing analysis and propagation ...
1
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2answers
51 views

digitaly controlled voltage divider for picky audio recording enthousiasts

I want to replace expansive multi-deck rotary switches with a micro-controller and digitally controlled (i2C or ISP) analog switches. It will be used in a vintage (1972) discreet transistor ...
1
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0answers
33 views

Thesis Theoretical Section [closed]

I am starting my bsc thesis preparation (hope I am saying it right) and I am wondering what should I include on the theoretical part. MY main experimental subject was the examination of the voltage ...
0
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1answer
47 views

CMOS Gates, I can't understand when we use those negation bubbles

I began to study CMOS gates, that are in my teacher's book, and I have 2 questions, because there is no explanation. If we use NAND or NOR , it means we have F = ~(A*B) and F = ~(A+B) and is normal ...
2
votes
1answer
75 views

FPGA: How do LUT's change their logic

I've looked at a couple of posts on this topic, but I can't really get a feel to them. Does the LUT have an input where the logic address is given, or does the LUT read from the D Latch? If anyone has ...
0
votes
1answer
54 views

Violating the minimum clock pulse width of a D-type flip flop

Any D-type flip flop has a specification for a minimum clock pulse width. For example, the 74LVC374 has a typical time of 1.5ns for Vcc=3V. But what can happen to the flip flop if a shorter pulse is ...
0
votes
1answer
59 views

Electromagnet Circuit

I'm working on a small project to power a magnetic lock that deactivates when a series of switches are turned on. I've re-designed my circuit based on help from another post, but isn't supplying the ...
0
votes
1answer
29 views

Will an arduino output pin set low ground a pin on a DFPlayer module

I have a DFPlayer MP3 module I'm using for a small soundboard project. I have a button that grounds ADKEY1(Pin 12), which triggers playing the next MP3. I'm adding an Arduino into that mix that I want ...
0
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2answers
54 views

Dual edge triggered D flip flip CMOS implementation. Less than 20 transistor

I need to implement a dual edge triggered D flip flop (DET) in a CMOS IC using 0.35u technology. The best design which I could fine is this one http://ieeexplore.ieee.org/xpl/login.jsp?tp=&...
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votes
0answers
110 views

What is the ABEL code for this 12x1 Multiplexer and Truth Table

I have to create a 12x1 multiplexer using two 8x1 multiplexers. Here is the truth table, I need the ABEL Code.. Please tell me how to write the ABEL code for this truth table of the given scenario. ...
0
votes
0answers
36 views

Confusion in creating 16 input Multiplexer using two 8input multiplexers

I have 16 inputs A0 to A15. Selection pins: 4 (S0 to S3) I want to create a 16 input multiplexer using two 8input multiplexers combination. But I dont know where to connect the selection pins and how ...
0
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2answers
18 views

SR Latch settles on equilibrium state with lower voltage supply

I need to use SR latch for my design and it was working fine. Until I started it with lower voltages. CON8 and O4 are the inputs. CON9 is the output. When I use 15V supply, it works very fine: ...
0
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2answers
44 views

Totem pole vs open collector configuration

Can anyone please explain for power consumption view point only whether totem pole or open collector should be preferred with a bit explanation?
0
votes
1answer
50 views

MC14011 NAND output voltage incorrect

I have a Motorola MC14011CP Quad-dual input NAND IC in which Vdd = 12v. I'm trying to use it as a NOT gate by tying the inputs of one of the gates together. When the inputs are not both true, the ...
0
votes
1answer
34 views

Metastability simulation

I am trying to observe the metastability by simulating (LTSpice) a chain of inverters and probe the signals in between. The oscillation never happens (I put more than 5 inverters to ensure enough ...
3
votes
1answer
72 views

Do I need to add smoothing capacitor for this setup

I'm trying to build an array (100) of WS2812B which are controlled over an Particle Photon, both are powered by a 10A/5V power supply. Powerwise: 10 WS2812B will be daisy-chained in one row Datawise:...
-1
votes
1answer
48 views

Connect combinantional block to JK Flip Flop

How can i connect combinantional block to JK flip flop in scheme like this: Function i want implement is 3rd column from first image. That is truth table but i think it's wrong how i get values for ...
-1
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0answers
67 views

Is this circuit possible? using same pins for active low/high

I designed this circuit : The goal is to use A B C ports on a pcb, to perform as: output- active low/high, or as an input. (not in the same time) All Fets are <...
1
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2answers
79 views

Bit counter using basic logic gates [closed]

I cannot figure out a puzzle which is to create a 4-bit bit counter using basic logic gates (NOT, OR, AND, NOR, NAND, XOR, XNOR, MUX, FULL ADDER). A bit counter tells how many bits are set in a value. ...
0
votes
2answers
66 views

Reduce an equation

How can I use boolean algebra to reduce the following equation? $$ \bar{a}\bar{c}+bc+ab $$ I understand how to get the answer using karnaugh maps, but using simple axioms I am unable to get the ...
3
votes
3answers
76 views

How do you design a CMOS buffer with exact same delay of a CMOS inverter?

Everyone knows that a CMOS inverter is simply a PMOS connected to an NMOS. There are situations in asynchronous design that we need to compensate for the inverter propagation delay in a parallel ...
0
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0answers
39 views

SMPS acceptable output ripple voltage - standard

After I received many suggestions in my last question to use a SMPS instead of an LDO I looked further into this matter. While checking different options (cost is my main concern) I checked some IC's ...
0
votes
2answers
78 views

barrel shifter using multiplexer: how to go about it

I am trying to under stand how to build a barrel shifter using multiplexers. I understand how the barrel shifter works but I don't get how you decide the number of multiplexers to use, and how the ...
1
vote
2answers
105 views

CMOS circuit design: How to implement an interrupt circuit that detects minimum or maximum peak?

I have an input signal sine wave like but comes with a little distortion. I need to give an interrupt when it reaches to minimum or maximum value with an acceptable tolerance. this graph is from a ...
0
votes
3answers
50 views

How to implement this function in transistor level?

I need to design a circuit that has this function. There is an input signal whether ON or OFF. I need this: Once the input signal is ON first, my output must be ON also and after that it has to stay ...
1
vote
2answers
63 views

How to make a NAND Gate?

Im using 123d circuits by Autodesk and I am trying to make a NAND logic gate. When i simulate my circuit (one in picture) it does not work and the LED does not turn on. I am using 2 NPN transistors, ...
0
votes
2answers
22 views

Which CMOS SPICE model should I choose?

I need to simulate digital circuits which have custom gates. For now I am not concerned about the specific CMOS technology, the transistor Length and Width, etc. I only need to glue NMOS and PMOS ...
19
votes
7answers
2k views

What will happen if the output from a NOT-gate injected- BACK to its OWN input?

Not-gate, if get a 0(Off) input, it gives an 1 (On) output. And if get a 1 (On) input, gives-back a 0(Off) output. Now, if-I could bring the output back to the input of the not-gate, then what will ...
0
votes
0answers
29 views

How to decide the required width for FIR filter output?

The following is a diagram of a FIR filter. If I assume lin = 8 bits, lcoeff = 5 bits and n=4. Which width is required for the signals ladd, lmult and lout if no rounding shall be performed? Can I ...
1
vote
2answers
578 views

Can I use Minecraft redstone to teach digital circuits? [closed]

I'm sorry if this question is off-topic. If it is, I would be thankful to know at which StackExchange site I should ask this question. Let me say first, I never played Minecraft myself. But I heard ...
-3
votes
1answer
70 views

How do you store a number entered through keypad buttons in D flip-flops? [closed]

In the circuit, only ONE value from N0-N9 will be high. So, only one of the OR gates will have a HIGH value. I need to use only the HIGH output from the OR gates output. I tried using a multiplexer ...
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votes
1answer
46 views

truth table in programmable logic array in digital electronics

While studying programmable logic array ,i came across this truth table but couldn't understand the logic how z1 and z0 are filled here ? ...
6
votes
2answers
571 views

What does the logic statement “F = AB” mean? Bitwise A AND B?

On an ALU data sheet there are logic formulae showing the results that will be output for various inputs. http://www.farnell.com/datasheets/1840939.pdf (Second from last row on page 3.) I assume ...
0
votes
1answer
120 views

Output type of incremental rotary encoder

I have been trying to choose incremental rotary encoder for speed control of three phase induction motor. My problem is that I am not sure what type of output should I choose. There is following ...
0
votes
2answers
40 views

74HC161 carry look ahead

When reading about 74HC161 synchronous counter, I understood almost everything except how the carry look ahead logic works. As far as I can see, when the counter reaches 1111, the TC pin is set to 1 ...
1
vote
2answers
46 views

74HC161 synchronous counter

I have one question on the 74HC161 synchronous counter, you can find the datasheet here: DATASHEET How can it be used as a downwards counter? Actually, is it reversible at all?