Digital electronics use a finite number of states, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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2answers
80 views

Best way to implement outputs pins with leds in a parallel way

What is the best way to implement an output but with also a led, so I can use the output for other purpose (for example a GPIO for a PIC, or a lot of logic gates) but with a led indicador that the ...
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0answers
17 views
-6
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0answers
19 views

vhdl timing question [duplicate]

question:why z rises to 40 at 50ns rather than 40ns? If change z to z <= x AFTER 30 ns; , why the first update of z takes place at 40ns ? ...
-5
votes
1answer
21 views

verilog code to perform {w=(3*(p+t-1))/t} with look up taples

I want verilog code to perform {w=(p+t-1)/t} with look up taples . The lookup table is to be realized as a ROM where: p is 3 bits t is 2 bits (and not equal to 0)
0
votes
2answers
63 views

74LSxxx Logic IC library for FPGA

I need to try different 74lsxxx logic ICs over a FPGA. As examples 4 bit adders, counters, etc which are more complex than primitive logic ICs. And it is time consuming and error prone to code in ...
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2answers
47 views

Will EMI strongly affect my sensor reading

I'm using an Arduino to read analog values from my sensor running at 5V using a voltage divider. The sensor contains a force resistive sheet where the resistance of the sheet decreases as force is ...
-2
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0answers
18 views

Digital Logic Systems: Have to convert to single precision floating point IEEE format.

I'm trying to learn how to convert decimal values to floating point in single precision, IEEE format. An example I'm working with is 61.968547 (base 10) to floating point. Can anyone verify that I ...
-5
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0answers
27 views

Leakage current variation with decrease in threshold voltage [on hold]

As mosfets scale down and follow Moore's "Law." The voltages used on the mosfets also scale down. Do these newer, smaller transistors used in digital circuits have more leakage current do to ...
0
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1answer
53 views

Question regarding introduction to Digital System Design [on hold]

I am a computer engineering student who find trouble understanding the concepts below. I have looked over wikipedia and my notes again and again and still have trouble putting all the concepts ...
2
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2answers
41 views

Need help with simple digital circuit that can change state and reset

It's been 20 years since I have used any digital logic circuits, so please explain things well and be patient. I just need a simple digital circuit that does the following: When the input state ...
-2
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0answers
52 views

Design a 3 bit comparator [on hold]

Iterative designs for comparators are quite successful which makes use of 1-bit comparator cells to make n-bit comparator. My question is how can we design a 3-bit comparator with a 2-bit and one ...
1
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2answers
69 views

What does the waveform for a Digital Addressable LED Strip look like?

I want to use this Digital LED Strip but with my own controller (i.e. NOT a raspberry Pi). The link has sample code but I want to be able to understand clearly in terms of hardware waveforms what ...
-2
votes
1answer
52 views

Shifting -5 V to +5 V signal to 0 to +5 V for ADC

I want to convert the output voltage of an ECG (-5 to +5) to 0 - +5 volt for ADC. Should i use Op amp ? What is my problem in this picture? I simulated it in Proteus ... but when input voltage is ...
3
votes
5answers
642 views

What does the value “Z” in the function table for this inverter stand for?

I came across a simple hex inverter IC with the truth table having "z" as an output state for a low (L) input. So what does Z stand for here? Does it mean a toggle or partial state? The other variant ...
1
vote
1answer
68 views

How can I show a tied-off output on a digital logic schematic?

Combinational circuit that takes 3 bit binary numbers as input and its output is 2's complement of even number and 1's complement of odd number Hey, I have this assignment that I'm supposed to do. ...
0
votes
1answer
40 views

Beagle Bone Black interrupts for optical encoder

I'm trying to have my optical encoder work on interrupts. I found some resources online that discuss it but they all seem to be based on an older version of debian since the files and folders in ...
0
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0answers
32 views

constructing truth tables of inner logic circuit based on greater truth table [duplicate]

I have a question about the below truth table and logic functions. \$H\$ is composed of other subfunctions \$G(a,b,c)\$ and \$F(c,d,e)\$, as show in the figure below, and I need to show the truth ...
0
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1answer
43 views

Number of logic gates for counter with each type of flip flop

I am designing two synchronous counters one mod 21 and the other one mod 30. Is there a way to know which kind of flip flop (D, SR, JK, T) will use the smallest number of logic gates? I know we can ...
0
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2answers
55 views

Which gate is better in buildiing the Full Adder ? XOR or OR

So this is question asked in one of the exams. As you know there are 2 ways to get the boolean expression for the Sum of the fully adder Given X and Y are inputs, C0 is the carry from previous adder ...
1
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1answer
57 views

frequency divider for two output frequencies

I want to make a frequency divider from flip flops that can generate two frequencies. For example, if the input frequency is fin then the output frequencies will be fin/30 or fin/35 depending on the ...
0
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2answers
41 views

D type flip flop feedback

The D type flip flop needs feedback from its inverted Q output to divide frequency by two. Is there an intuitive explanation for this?
0
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2answers
76 views

Building a 3-input NAND or NOR gate with 2-input NAND or NOR gates - how do I approach questions like these?

For NAND, I am doing a truth table for it and then truth tables for all the possible combinations, but as you can see the process is very long and I am still yet to get an answer. Same goes for NOR ...
0
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1answer
39 views

Understanding computer organisation and architecture [closed]

What are some of the user friendly books for "computer organisation and architechture" which are best for self study. Such a text that one can grasps the big picture, and understandhow various things ...
0
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1answer
60 views

Do I need a level shifter with an open drain output

I'm currently doing a schematic that has an IC that operates at 3.3V (HDC1000 for those curious), and the rest of my digital operates at 1.8V. I have a level shifter for the I2C lines, but there is an ...
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3answers
187 views

Understanding Test Parameters on Datasheet (CL pF)

On Page 7 of the datasheet for M74HC590 It uses a CL (pF) At the bottom of Page 8 is the test circuit which shows where the CL(pF) goes, in regards to a circuit diagram, but I don't understand that ...
0
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1answer
34 views

Latching battery switch triggered by interrupts

I've got an accelerometer with a couple interrupt pins and I've figured out how to get it to fire its interrupts on any change in acceleration or lack thereof for a given duration. What I want to do ...
0
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1answer
54 views

(Infrared LED Circuit) Can i use this circuit with 3.3v logic?

I made this circuit for a 5v logic. I plan to use it as a remote control. So pulses. i hope that with this circuit i achieve more range as with the default remote. I already made it but now i have ...
2
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2answers
78 views

When should I use negedge on a clock signal?

I was reading about block ram and I came across the following post. I notice here that whoever wrote the code is using negedge on the clock signal. Thus far almost all the examples I have seen of ...
9
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6answers
597 views

memory for the simplest possible computer (Pi0K)

I'd like to build the simplest possible computer. I don't care about speed or storage, indeed having slow speed and low storage is a huge advantage as I want to build it out of transistors (ideally ...
0
votes
2answers
78 views

Controling 3 LEDs using only 2 IOs

I once saw somewhere that it is possible to control 3 LEDs with 2 IOs and only using LEDs and resistors. The high state is 5v and low state is 0v. With 2 digital IOs, we can have 4 different possible ...
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1answer
48 views

transition speed causing issue with jk flip flop

i'm using jk flip flop to latch on a state given by 2 switches to either stay ON or stay OFF, knowing that one of them could stuck on ON which is why i use one of them as the clock input for the 4027B ...
0
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1answer
47 views

Demux realisation in hardware

Following the previous post Output of XOR gate with high-impedance input I am interested further how four-valued logic of SystemVerilog gets eventually implemented in hardware. Could someone correct ...
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5answers
162 views

Converting a pulse train to a single pulse

Posting my question with a schematic I want to detect AC line voltage using an optocoupler. When i feed the optocoupler input with an AC line, i get a 50 Hz pulse train at the output. Usually this ...
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1answer
34 views

OrCad issue: Logic circuit simulation…ambiguous output

After simulating the following logic circuit(in OrCad),the resulting output -'y' is unclear. It seems to me that everything is fine, yet the result is ambiguous. Can you, please, explain what is the ...
0
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2answers
70 views

Set multiplexer inputs to a logic 1 state

How can I set, in Orcad, all the entries of multiplexer(in the picture) (except: 1, 13), to logic state '1' (for example, I understand that if I place 'ground' to some entry, then it will be ...
0
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0answers
38 views

Create Moore machine with logicly

I try to implement a Moore machine with http://logic.ly. I don't know if I do something wrong or whether it's a application limitation but I'm not able to get a working connection from the d-flipfop ...
0
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0answers
95 views

Find maximum clock frequency at which a given counter can be operated

What should be the maximum frequency at which the given counter can be operated: Each AND gate, JK flip flop takes 10ns, as propagation delay. My solution: To calculate that we need to know the ...
0
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0answers
36 views

What is the difference between ASM and ASMD charts?

I've been looking all our the place but I just can't figure out the difference between both of them. Any help would be appreciated.
3
votes
3answers
339 views

How do TTL NAND gates work?

This is supposed to be a simple NAND gate. I understand how the output is 1 if one of the inputs is zero but if both inputs are 1 then the base of Q1 is supposed to be zero. This is what I don't ...
0
votes
3answers
57 views

Why is the output (in the truth table) inverted in a ic 74154 used as a demux?

I am studying Digital Principles and Applications from Malvino and Leach. I have a doubt in the demultiplexer section. This is the image of a 1 to 16 demux. I understand how it works. So, if ABCD = ...
4
votes
4answers
160 views

Driving a 7 Segment Display with a register vs wire

I few days ago when I got my FPGA I created a module to drive my 7-Segment display. I used only continuous assignments to drive the leds. ...
0
votes
1answer
30 views

Initial Seed for LFSR in PSpice

I am implementing a Linear Feedback Shift Register (LFSR) in Pspice A/D with a new logic family. Anyways, to initiate the random number generation I am required to feed in some value to the circuit, ...
1
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1answer
39 views

Is there a specific rule for a counter to go through states?

simulate this circuit – Schematic created using CircuitLab I have the following circuit and I have to tell what the circuit will do? I determined the state equations as ...
3
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3answers
103 views

Digital vs Analog signal for data transfer across boards

I have 1 board that reads data from a sensor, while another board wants to get data from that sensor. Is it better to have an ADC on the first board, then send that data via i2c to the 2nd board? Or ...
-4
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1answer
88 views

implement a logic in circuit without using a micro-controller

Given a sensor and push button output I need to implement this logic without using a microcontroller If the sensor is ON the output is ON and stays ON till the push button is ON then output goes ...
1
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3answers
47 views

How to add (all zero state) to the states of linear feedback shift register (LFSR)

I need to add the state of all zeros to the states of an linear feedback shift register. How can I do this?
1
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1answer
36 views

MOSFET Labeling 2/1 4/1 16/1

What do the 2/1 4/1 16/1 labelings mean? What would you search on google to find the answer? I've tried searching mosfet diagramming labeling 4/1 16/1 MOSFET diagramming Origin of pic: ...
0
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1answer
30 views

How to combine demux units and other circuit components in order to obtain a bigger demux?

How can I combine, for example, a number of 3-8 demux units and perhaps other components such as transistors (takes three inputs and has 8 outputs) in order to make a 4-16 demux unit or perhaps even a ...
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0answers
33 views

How do I get a clean PWM (Modulation) signal to my RF supply/control for my laser?

I connected a PWM signal to the MOD input for the RF power supply. On the scope, it changed from a relatively clean signal to a very noisy signal. The laser head did turn on and fire, however, the ...
1
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2answers
103 views

Why is XNOR gate not referred to as an “Equality” gate?

I am a programmer and I was thinking about some logic I was just writing and the logical statement started out as a negated exclusive or, but this simplifies to a logical equality check, e.g. ...