Digital electronics use a finite number of states, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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1answer
41 views

{Multiplexors} combine 2:1 to from 8:1

I have a question of combining 2:1 to form single 8:1 multiplexor This is acheivable by using 7 2:1, with 4 of it at the first level, 3 of it at the second level, and 1 of it at the third level. ...
3
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2answers
438 views

What do hardware address pins do?

I have been delving deep into digital logic and am trying to understand some memory architecture basics. I have started looking at data sheets to get a grasp on some real-world components and noticed ...
0
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1answer
36 views

SN74LS32N Not Working Correctly

I am using a SN74LS32N as an OR gate in a project, and I have hooked it up to an Arduino, but even when none of the inputs are powered, the LED that I hooked up to the output turns on. Why is this ...
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1answer
62 views

Why doesn't a capacitor connected to a MOSFET charge to VDD

If an nmos which has the gate and drain connected to VDD, and the source connected to a grounded capacitor, the nmos will start conducting and the capacitor will start charging as long as VDD > VTn ...
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0answers
22 views

How do I build a simple stack using logisim that can push and pop as needed [on hold]

So, when my professor was explaining stacks to us, it seemed easy enough until I tried to do it myself. So all I need is a stack pointer(which is my register) and it'll show you what is on the stack ...
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1answer
145 views

How are state machines used in electronics?

It seems to me the use of state machines is just in logic circuits, is that correct? If not do they have other uses, such as say in microcontroller programming? I'm quite new to the subject and wonder ...
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0answers
71 views

Diy raspberry pi [closed]

I would like to know how to create a diy Raspberry pi like the arduino clone. Can some one show me a diagram of it? How to upgrade the ram how to install the os!!!
0
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1answer
33 views

Coding a priority encoder

Let's say I have a 25bit priority encoder. So each input pin from \$i_{24}\$ to \$i_0\$ has its distinct priority in our encoder. That means that if more than one inputs are active, the encoder will ...
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1answer
41 views

Advanced Technology Mapping [closed]

kindly help me about these two problems,I do not know how to perform low cost technology mapping using cells,
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1answer
33 views

Implementing a function with 4 inputs with 2x4 decoders

I'm a bit confused on how it is done. In the pdf we were given it only showed the solution, no explanation whatsoever. My guess is in order to implement 4 inputs with 2 input decoders, the decoder ...
2
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1answer
35 views

With a HDL design how/when do we know that we need multi_cycle path, how do we implement it

I understand that we use the multi_cycle path when the delay between launch and latch register shall be more than 1 clock cycle. With a HDL design how can one predict that the combinational logic ...
0
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0answers
34 views

Memory Banks in verilog for lzss decompression [closed]

I am designing a lzss decompression engine using verilog and i need to dispose up to 4bytes of data every cycle. I am thinking of using interleaved memory bank so that i have atleast 4 read and write ...
0
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1answer
35 views

Kmap, 4 variables

I have a question about 4 variables Kmap. We get used to the ones with 2 variables at the column and 2 variables on the row, just like the ones below. I am wondering if we can have 3 variables at ...
0
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0answers
43 views

Need help with design of level shifter [2 vdd, 2 gnd]

This is the first time I've run across a system design with these requirements and it has me stumped. I need a level shifter made of smd discrete components capable of shifting SPI SCK and MOSI ...
0
votes
2answers
54 views

How to convert a boolean function into K-map

I would like to know how can I convert the following boolean function into a truth table and accordingly construct the k-map $$F=A′B′C′+B′CD′+A′BCD′+AB′C′$$ thanks in advance :)
0
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1answer
54 views

Real-life discrete monoflop

I my current project I need a high-side PMOS to disconnect a load once a over-current or (downstream) over-voltage condition is detected. Obviously without a permanent latch, once the PMOS opens, a ...
1
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1answer
57 views

Trouble with phase locked loop: phase comparator is just showing the VCO output (with picture)

I am using the CD4046BC for the first time, and do not understand something that is happening. I am using the type I phase comparator, which is just a simple XOR logic gate. When I have the input as a ...
4
votes
1answer
142 views

Why would this logic gate use negative voltages?

I'm reading a data sheet for a hex buffer with enable- a pretty simple logic DIP. Here's the logic diagram and pin assignment: This all makes sense to me until I look at the electrical parameters. ...
21
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6answers
3k views

Why have two NOT gates in series?

I have recently been looking at the datasheets for the 74HC139 IC in order to see if it was suitable for my project, and have come across the following logic diagram which strikes me as a little bit ...
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1answer
52 views

ADC Analog & Digital Supply?

I'm working on a circuit based on ADC and DAC. I understand that keeping ground plane of analog and digital section different is crucial in many applications for reducing digital noise interference ...
4
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3answers
625 views

Multiply clock frequency by three or more times?

Frequency of a digital clock signal can be doubled by using an EXOR gate (clock at one input pin and delayed clock at another). Can we use any similar circuit which can multiply frequency by three ...
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3answers
86 views

Is demultiplexer universal gate?

I want to prove that demultiplexer is universal gate. Can we build any logic gates using demultiplexer? Can we build AND, NOT, OR gate?
4
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1answer
173 views

Why two inverters cascaded in multiplexer control signal terminals?

Why cascaded inverters are used in the multiplexer when it is possible to realize the circuit using a single inverter.
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1answer
64 views

Necessary and Sufficient

Consider 4 kinds of necessity and sufficiency for a truth. A condition which is necessary and sufficient for something to be true A condition which is necessary but not sufficient for ...
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2answers
66 views

How to light a LED using photo transistors output?

I built a circuit using RPR220 photo sensor to detect the surface displacement caused on a material when external force is applied. I could see the output on a CRO even when there are minute changes ...
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2answers
94 views

Why does more bandwidth mean higher bit rate in digital transmission?

I understand that similar questions like this one have been asked before on this site, listed below. However, I am confused about the answers. If I explain what I think I understand, can somebody ...
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3answers
140 views

IC to count number of inputs that are on?

I have 8 wires, and I want to count how many of these are in a high state and convert this to a 3-bit binary signal. If the count of inputs that are high is greater than 4, I don't care what exact ...
6
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2answers
178 views

Cross-coupled logic gates and timing

I had a hard time getting a right title for this question since I'm a software guy trying to get the basics of my hardware down. Since all computers basically start with logic gates and go from there ...
0
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1answer
38 views

Analogic pin 0 (pin 14) problem UNO board

I have an Arduino Project developped for an UNO Arduino Board; the sketch have a size of 30000 bytes aprox. The whole set of features requeried works perfectly, but I have a problem with the A0 pin ...
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1answer
64 views

Difference between parallel adder and serial adder when adding two binary numbers

I am having a hard time understanding difference between parallel adder and serial adder when adding two binary numbers. Wikipedia does not have any information, and google image search is bringing me ...
7
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1answer
110 views

Randomization of events in old hand-held games

I have very little background on electronic design. After studying a bit on how pseudo-random number generators work on general purpose computers, I became curious on how old hand-held games (like ...
5
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4answers
541 views

How can I slow down the switch time of a MOSFET?

I have an NMOS that is switching too fast for my application. Into the gate I am sending a logic-level square wave (PWM). Unfortunately for me, as expected, the output is also a near square wave. How ...
0
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2answers
89 views

3.7v > 3.3v voltage stepdown with logic-driven on/off control [paused]

(PAUSED): This topic is currently on hold as I source necessary hardware. I need to connect a Wi-Fi/RS232 module to a low-powered monitoring device, and for maximum portability, I'd like to power the ...
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0answers
48 views

Hold switch trigger delayed

I have a small battery driven, microchip controlled project where I use a rotary encoder for toggling/setting various settings. Mostly software based as that is what I'm more familiar with as of yet. ...
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1answer
70 views

Schmitt trigger “action”

I current have a Schmitt trigger chip to clean up an output from one of my optical encoders and I am thinking about using an XOR gate to feed in both encoder outputs to double my encoder output ...
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3answers
82 views

2xAAA battery => 3.3v/250mA step-up converter with logic-driven power control [superseded]

EDIT: The requirements in the question below appear to be practically unsolvable, but happily after a bit of digging I actually found an alternative equivalent RS232 device which runs off a 3.7V Li-Po ...
0
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2answers
57 views

Push-button and Jk flip flop

I have a mechatronics project where I have to use a push button switch at the input of A jk-flip flop my problem is when I click the switch it gives me the input 1 to the jk input the moment I remove ...
4
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1answer
63 views

Analog to 1-channel Digital Converter

I have 0-5 V analog value coming in, and I need to convert it to a high or low 5V digital signal. Essentially, I need to create a 1-channel A/D converter. The idea is that when my analog voltage ...
5
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2answers
482 views

why in some circuit there is use of bubble followed by bar?

It is a circuit of ring counter. The clock here is negative triggered. but for set and clear it use bubble with bar.What is the need of bubble followed by bar. why it can not use a PRE and CLR ...
3
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3answers
255 views

Digital logic input with very wide input voltage range

We are developing an industrial controls product that will be used to monitor the presence or absence of voltage ranging from 5V to 480V. Since the unit will be generic and programmable, this input ...
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1answer
134 views

Odd Parity Output as Input to Second Circuit

Lets say there is a circuit that takes 3 bit input and produces an odd parity bit output.So I have arrived at the following truth table. ...
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2answers
112 views

How to design a left shift register

I want a circuit in which I get the following sequence: 0001, 0010, 0100, 1000, 0001 I know that it's 4-bit shift register. But what is my approach to design ...
1
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1answer
56 views

VGA switch 3 in 1 out [closed]

My team and I are going on a software development competition in 1 week. We will demonstrate the software on multiple laptops, but we have only one projector. So we need to be quickly able to switch ...
1
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3answers
95 views

Why does my book's D flip flop differ from others?

My understanding of a D flip flop is that when the clock is high and D=1, it sets Q to 1. If D=0, Q is set to 0. So it is like a set to 1 if D=1 and reset to 0 otherwise. The table repeatedly given ...
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2answers
38 views

Need for edge triggered versions other than master slave

I am studying synchronous digital circuits and I have come to the conclusion that master slave flip flops are edge triggered? Is my study correct? If master slave versions ARE edge triggered, why do ...
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1answer
60 views

Identification of hardware interrupts in microprocessor 8085

I am familiar with the RIM and SIM instructions that are available in the instruction set of microprocessor 8085. And thus I can enable RST 7.5 and RST 6.5 interrupts using SIM instruction and EI ...
0
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1answer
37 views

Using capacitive coupling to implement pulse transition

I was reading about master-slave flip flops, used to implement edge triggering and I read that instead of using master slave configurations, using RC coupling to clock inputs could also enable pulse ...
0
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2answers
44 views

Use of Toggle flip-flops and JK flip flops

I was studying digital electronics, especially latches and flip-flops and the like and I came to understand that flip-flops are basically memory storage elements, in that case why would I need ...
1
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1answer
262 views

Design of a 1-bit adder-subtractor with additional carry/borrow input

I have to design a 1-bit binary adder/subtractor unit that can both add or subtract two input values A and B depending on a control input C (it is assumed that two's complement is used). Also, the ...
0
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1answer
41 views

Level-triggered flip-flops in shift register

I am studying shift registers. My book mentions that level-triggered flip-flops cannot be used to make a serial-in serial-out shift register. What is the reason for this?