Digital electronics use a finite number of states, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.
7
votes
3answers
300 views
Circuit works on breadboard but not PCB
I have a fairly simple circuit that works perfectly on the breadboard, but I am having a lot of trouble transferring it to a PCB. I am seeing very strange behavior which lies outside of my current ...
0
votes
1answer
79 views
combinations of binary digits for decimal numbers
1.Four bits are required to represent the ten decimal digits, and since there
are 2^4 combinations of four binary digits, six combinations are not used and the code is
said to contain redundancy.
...
10
votes
2answers
35 views
Why do some pins have `~` signs next to their numbers?
I was looking at my Arduino Uno and I noticed that symbol by digital pins 11, 10, 9, ...
1
vote
1answer
67 views
Finding the no. of decoders required in cascading
I am trying to solve the following question.
How many 3 to 8 decoders with an enable input are needed to construct
a 6 to 64 line decoder without using any other logic gate.
I have a Digital ...
1
vote
1answer
80 views
Magnitude comparator implementation
I have stuck on implementing magnitude comparator for 2-bit numbers (three functions - greater, equal, less).
It is pretty easy to implement it with AND and OR gates, but the point is the task is to ...
1
vote
2answers
88 views
Addition modulo 26 in Digital Logic
I have two 5-bit signals, each guaranteed to be carrying a value between 0 and 25. I would like to add them together and get another 5-bit value between 0 and 25, simply taking the ...
2
votes
1answer
174 views
What is the name of this coding algorithm
as a school assignment we were given simple graph of FSM and the task is to design digital circuit described by this graph. Everything is fine I just followed my notes. While encoding the states I ...
5
votes
4answers
271 views
Why do we clock Flip Flops?
I am trying to understand Flip Flops & Latches. I am reading from Digital Logic book by Morris Mano. One thing I am not able to understand is why do we clock flip-flops ?
I understand why do we ...
0
votes
1answer
191 views
Can someone help check my solution for this timing diagram?
I've been working on some timing diagrams and I keep mixing up the behaviors for the different flip flops.
EDIT:
I think I have the logic correct. If someone could please let me know if I'm ...
1
vote
1answer
131 views
What IC should I use to make a binary clock?
I am wanting to make a binary clock. A lot of the schematics I've found are for Arduinos or Raspberry Pi. As much as I appreciate the use of minicontrollers, I don't want to do that for this ...
0
votes
2answers
181 views
Given a gated SR latch, How do I make it a set dominant gated SR latch?
Another weirdly worded question in my digital logic book. It doesn't specifically define set-dominant or reset-dominant - nor does it show how to use these in practice with drawing circuit diagrams. ...
0
votes
3answers
89 views
How can an SR Flip Flop be made using a D Flip Flop and other Gates?
An SR flip flop is a flip flop that has set and reset inputs like a gated SR latch. How can an SR Flip Flop be made from using a D Flip Flop and other logic gates?
I've done several searches online ...
1
vote
1answer
48 views
Invalid inputs in a SR Latch & Enabled SR Latch
Lets consider a SR Latch built with NOR gates. The invalid inputs are S=1, R=1. With enabled latch [gated latch], the invalid inputs are same, S=1, R=1.
Now, lets consider, NAND gates, in SR Latch, ...
3
votes
4answers
405 views
Displaying a 2-digit integer on two 7-segment display
I'm having trouble displaying a binary number into a display. I'm not sure of how to split a number in binary into its individual numbers.
For example, if I want to display 25, I want to split this ...
1
vote
1answer
53 views
ADC PCF8591 - change range for measuring
I'm doing my first project on my Raspberry pi with analogue signals, using the PCF8591 ADC.
I managed very easily to measure 0 - 5 V with the chip, connecting the Reference Voltage (VREF, pin 14) ...
0
votes
1answer
61 views
Next-State Tables
Could someone give me some tips on how to approach state tables? I'm working through my textbook for an upcoming exam and I'm stuck at this problem:
17) Design a circuit that has an input clk, ...
0
votes
2answers
215 views
Number of bits for tag, index, and block in a direct-mapped cache
Suppose you have a 64-byte cache on a system with 16-bit memory addresses. If the cache is direct-mapped and it has 10 bytes of tag overhead in total, how many bits are used for the tag, index, and ...
3
votes
1answer
96 views
Positive and negative logic gates
This is a really basic topic but it's getting me confused.
The truth table for any gate remains the same for both positive and negative logic, right?
like for a NOR gate the truth table would always ...
1
vote
2answers
78 views
Post synthesis level simulation xilinx xst
I have written a verilog code and it is working fine at behavioral simulation level. After this I went for synthesizing the design using XST tool in Xilinx ISE 13.2. Running the post simulation level ...
0
votes
2answers
60 views
How to block/allow an i2c data signal to pass on to another device
I have three devices which I'm working on and one of them needs to control i2c communication between the other two.
Each of the devices is based on an AtMega or AtTiny chip. The Controller (based on ...
0
votes
1answer
59 views
Single FET Bus Switch schematic in EAGLE
I've added a SN74CBT1G384DBV into my schematic in Eagle (which I want to use to enable/disable a logic signal line). Once placed into the schematic there only appear to be connection points for VCC ...
2
votes
2answers
137 views
Difference between RTL and Behavioral verilog
Can someone tell me what is the difference between RTL and behavioral Verilog code? Is there any clear cut demarcation between designs at these two levels?
5
votes
3answers
230 views
When do truth tables use the “Don't-care” term?
In which situation can be used the Don't-care term?
Suppose that I want to use 6 symbols: I need 3 bits, which in turn can generate 8 combinations. Since the last ...
1
vote
2answers
259 views
Help verify 8x8x8 LED cube circuit
I am a beginning hobbyist when it comes to electronics. I have read lots of theory but I only have a little bit of hands on experience. I would like to build an 8x8x8 LED cube and I came up with this ...
1
vote
0answers
161 views
Is there a way to create a 2 bit / 4bit memory element using Flip Flop?
I have come across Flip-Flop memory elements & it seems really cool, So far i have only did Set, Reset Using Flip Flop, I am eager to know that Is there a way to create a 2 bit / 4bit memory ...
6
votes
3answers
282 views
Why is S=1, R=1 state forbidden in RS flip flop?
I have come across the RS flip flop & I have tried implementing that on a simulator & using actual logic gates. But I'm still not sure whether I have correctly understood the unstable or the ...
2
votes
1answer
64 views
How to detect and identify multiple points of contact
I am looking for a way to detect & distinguish multiple points of contact from force or pressure. I have asked a related question at the URL listed below:
How to encode a large number of digital ...
3
votes
2answers
124 views
How to read the datasheet of a Digital transistor?
Could anybody please help in understanding the parameters of Digital transistor from its datasheet. Basically i need two parameters which decide the Maximum voltage for off state(0 state) and minimum ...
2
votes
1answer
104 views
How to simplify the actual function using K-maps?
So I'm trying to learn how to use Karnaugh maps. I've found what are the rules of simplification and how to apply them but every tutorial or lesson I find uses some generic function like "Here's how ...
1
vote
2answers
72 views
Domino logic output latching?
I've developed a domino circuit which calculate a simple logic function.
I would like to latch the output "sum" into registers for further use. At the moment the logic goes to 0 during precharge as ...
1
vote
1answer
71 views
Can someone explain how this truth table was filled in from a Mealy model?
I'm having a bit of trouble figuring out how the truth table was filled in. I understand how to draw the diagram from the first table and I understand the boolean expression given from the truth ...
2
votes
1answer
116 views
How to find the critical path delay of a big combinational block
I have a 54*54 multiplier, i want to find the critical path delay.how do i go about, should i clock the module in order to find the delay?
6
votes
5answers
239 views
How to understand the SR Latch
I can't wrap my head around how the SR Latch works. Seemingly, you plug an input line from R, and another from S, and you are supposed to get results in Q and Q′.
However, both R and S require input ...
2
votes
1answer
108 views
What does non-combinational area represent in synopsys design compiler
I have designed a ripple adder using full adders. In order to find delay incurred to perform this addition I included a clock in each full adder module. In my main code I instantiated these modules to ...
1
vote
2answers
74 views
74 Series Logic Power switching with Gnd? (74Hc86)
I'm trying to cut power to the chip to "disable" all outputs without needing to know the input values or changing them. What happens if I use a NPN transistor to let the GND pin float and pull it to ...
2
votes
3answers
100 views
How to encode a large number of digital input signals into a signal result
I would like to know how I can detect simultaneous pulses on several wires. Essentially I will have several wires that will serve as connection points when pressed upon. A simple visualtization of ...
3
votes
0answers
136 views
Has anyone transmitted data across a badly coupled transformer and recovered the data correctly
I've recently had to set-up a data transmission system on a rotating machine. The data was collected and serialized from ADCs connected to strain gauges mounted on turbine blades of a power generator. ...
2
votes
1answer
246 views
XOR gate; transistor level design [duplicate]
What would a transistor level design of an XOR gate look like?
1
vote
2answers
117 views
Is there a glitch / race condition at the output of this circuit?
The input rising and falling edges occur at time t = 0. The propagation delays of the respective gates are 3 and 4 ns, as shown.
According to my analysis, the waveforms are as below:
As I've ...
1
vote
2answers
110 views
Automating Filling of Humidifier - Logical OR Gate
I have an Ultrasonic Humidifier that I use to humidify my shop. I have to fill its 2-gallon tank daily which is becoming a nuisance. Rather than connecting it to a larger tank, I have opted to ...
0
votes
1answer
102 views
Maximum clock frequency for multi-cycle vs pipeline
Suppose you have latencies:
IF: 10 ns
ID: 11 ns
EX: 12 ns
MEM: 13 ns
WB: 14 ns
What is the maximum possible clock frequency for a pipeline with this design? I ...
5
votes
4answers
140 views
Digital Compass identifying direction of travel for use with trains
I work in a control center for a train company in the UK. Our trains work in either direction but only one end has first class carriages. Because trains on our network reverse quite a lot it is ...
2
votes
3answers
210 views
Why does active low even exist?
In my career I've often encountered signals that are active low (Reset being the most common). I've even seen interfaces where all control signals are actively low.
To me, this is very unintuitive ...
1
vote
3answers
203 views
How does an AND gate behave in this situation?
I'm a beginner and I want to know how a logic gate circuit works:
Will the led turn on just when I press the 2 switches? Or I'm doing something wrong?
1
vote
1answer
69 views
Digital Circuit question - sensing input across power rails using a micro
In the Circuit shown below, I am trying to achieve the following (I know my circuit is not correct, it is an attempt).
Problem: WHen INPUT_N = 0V, the input to the microcontroller does not go low.
...
1
vote
0answers
91 views
Simulation of a circuit
I am trying to simulate this circuit i want to know if the circuit i assembled is correct?
i want the current of VCCS element 1 and 2 plotted on a graph as i vary Vtun, Vsprog and Vdprog. I am ...
4
votes
2answers
249 views
Frequency multiply a digital signal using pure digital ciruitry (i.e. without PLL)?
Is it possible to multiply the frequency of a digital signal using digital components alone, and at the same time, preserve the duty cycle?
I could finally come across the circuit below: it doubles ...
1
vote
1answer
71 views
Random-delay gen
Some years ago I tried to design a circuit where (among other things) a LED flashes after a kinda random delay. As it didn't work, (and after raging and destroying everything that could help me solve ...
2
votes
3answers
100 views
VHDL Error (Simple Expression Expected)
I'm new to VHDL and I'm having a problem with my code that I can't seem to fix. We're supposed to do this using either selected signal assignment or table lookup. Mine is kind of a combination of the ...
-5
votes
2answers
105 views
Designing FIR filters [closed]
How can we realize a second order digital FIR filter without using a microcontroller. What assumptions would be taken?
