# Tagged Questions

Digital electronics use a finite number of states, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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### How can a logic gate work with multiple signals if a circuit only (supposedly) uses one electrical line?

On, say, a circuit for a lightbulb there's only one line for the current to flow, and that current is illustrated in every circuit I have ever seen. Being a beginner to this I am wondering how that ...
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### Is there a way to create a 2 bit / 4bit memory element using Flip Flop?

I have come across Flip-Flop memory elements & it seems really cool, So far i have only did Set, Reset Using Flip Flop, I am eager to know that Is there a way to create a 2 bit / 4bit memory ...
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### Minimum #states in State Transition Graph [on hold]

I have the following question at hand regarding a sequential circuit: Can someone please help me solve this question? It is not a homework question. I was preparing for an exam and I was solving ...
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### Interpreting a digital logic diagram [on hold]

I wanted to know the meaning or how to interpret the inputs to get the expression for the output f? Can someone please help me out?
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### How to cycle through bits of information for a hex display?

I am doing some work with a Hex Seven Segment Digital Display with a built in decoder that takes in 4 bits of information. Controlling it I have 4 cascading T-FlipFlops whose outputs are inverted so I ...
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### Clock skew? Good or bad?

So, I've been reading up on clock skew. I came across the fact that clock skew can be incredibly useful, in the sense that positive skew can be used to speed up the circuit by increasing the clock's ...
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### Design a circuit using only 2 to 1 multiplexers that implements the function of an 8 to 1 multiplexer

I'm not entirely familiar with multiplexers and I don't fully understand the concept of how I can make a 2 to 1 imitate a 8 to 1. Is there a predetermined/default truth table for multiplexers that I ...
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### Connecting microcontroller 3.3V output to relay using ULN2803A

I have a need to connect an ARM micro-controller with 3.3V digital output pins to a few 12V solenoid water valves. I figured that I can use a ULN2803A for this task. The internal circuit for each ...
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### How to cycle through outputs ONLY given clock signal?

Purely using digital logic devices (no microcontroller) I was hoping to create something that will cycle through its outputs (only 1 pin high) given only a clock line. Daisy chain flip-flops? I ...
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### Digital Logic and Assertion levels

I'm struggling to get my head around assertion levels and how it relates to logic levels / functions. For example. Let's say we have 2 input signals, A and B So A assertive high and A assertive ...
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### Digital Circuit with Toggle Switch using Logisim

I'm supposed to design a small digital circuit (with Logisim) using basic logic gates, so that when this circuit is used with the chosen switch (which has to be a button), it will make the circuit ...
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### How are registers implemented in microprocessors?

A register is a temporary storage facility within the CPU that holds data for computation purposes. What I question is how this is structured via engineering principles within the circuity: 1.I had ...
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### If digital logic requires a digital signal, does a computer's PSU have to make the signal digital before starting? [closed]

We know that the 120v from the wall is analog ... it looks like this: And the digital one that the components will use (transistors, diodes, etc.) will look like this: That would imply that an ...
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### Multiplexing a big 7-seg display with MAX7219

I've a problem with this circuit, it should drive 2 (or more) big 7-segment display using a MAX7219 and the relative Arduino's library. It uses ULN2003 and UDN2981 to use +12V and a series of 5 led ...
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### Component Advice - Single Digital Line Cutoff

I have a command signal +/-10V 20mA (max) is going to a motor controller. The command signal is varied using a National Instruments I/O device but the problem is that stopping the LabVIEW program/VI ...
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### IGBT Logic Switch

I am trying to make a switch with an IGBT STGP19NC60HD. Here is a link to the data sheet. My simple circuit looks like this: simulate this circuit – Schematic created using CircuitLab Im ...
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### Building a toggle with a flipflop?

I'm trying to build a toggle that turns a 4 bit counter on or off. Here's where I'm at so far: As you can see, I'm using a single D flip flop. Ideally I want one switch to disable the chip, and ...
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### Issues with 4-bit counter when porting to PCB

I need help or maybe an explanation on a particular issue I am experiencing when porting a small and relatively simple circuit from a breadboard to a PCB. The circuit is for a school project used to ...
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### High current in the presence of high frequency digital logic circuits

I'm in the process of designing an ARM single-board computer that would also have high current (18A) running through the same board. Think of a BeagleBoard, but powered by a 6V/2800mAh battery. So the ...
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### Recommended voltage/current for dry contact input?

What would be a reasonable value for voltage and max current to used in conjunction with a remote dry contact output so that it can return to my MCU (through isolator)? I plan on using this input for ...
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### How to wire up optocoupler for digitally controlled UV (under voltage) input protection?

What I am trying to build is an under voltage input protection. It will always limit the voltage flowing into the output end to the microcontroller to be 3.3V, but when the input goes below 380V, it ...
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In my textbook the gate delays for the n-bit ripple adder is given as $2n$ for $c_n$ bits and $2n-1$ for $s_n-1$ for the circuit as shown below: But, for a 4-bit Carry Look Ahead ...
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### How to convert an expression from SOP to POS and back in Boolean Algebra?

How to convert an SOP expression to POS form and vice versa in Boolean Algebra? Eg: F = xy' + yz'
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### How to extend this particular multiplexer circuit to 4 x 4 channels in / 1 x 4 channels out?

How to extend this particular multiplexer circuit to 4 x 4 channels in / 1 x 4 channels out? Forgive me my ignorance, I'm just a my very beginning with this stuff... Thank you!
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### How to embed a clock oscillator inside a digital block? Specifically, how is this defined for Synopsys DC?

I have to embed a clock oscillator inside my logic block for layout purposes. It's not an option to leave this block out and just bring the clock port in. Is there any way to define an internal net as ...
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### How do I simplify this sum of products expression into an easier sop form

'=Compliment D=P'VST + PV'S'T + PV'ST'+ PV'ST + PVS'T' + PVS'T + PVST' + PVST I'm having trouble simplifying this.
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### Domino logic output latching?

I've developed a domino circuit which calculate a simple logic function. I would like to latch the output "sum" into registers for further use. At the moment the logic goes to 0 during precharge as ...
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### Dealing with digital circuits and their associated switching speed?

When designing a digital one-minute counting circuit I came across a difficult problem. Basically, I designed the circuit to drive the (normally HIGH) clock of the 10s slot low if the 1s slot's ...
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### Drawing circuit activity through a D flip-flop while ignoring propagation delay

Can someone explain how would would draw the Y and Z activity in the following problem (if we ignore propagation delay and assume Y and Z start at 0)? How do the clock and X help in this problem? ...
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### Logic-circuit physical implementation

I've got a logical design that uses roughly 3000 NAND gates. So far it's only on simulation, but I would like to physically implement it. The circuit is already simplified. What are my options to do ...
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### How is Crystal Oscillator implemented in digital circuit to generate clock frequency. What part of crystal oscillator makes the clock signal?

How is Crystal Oscillator implemented in digital circuit to generate clock frequency? What part of crystal oscillator makes the clock signal? I know the fact that crystals has its resonating ...
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### How do I use multiple BCD switches as a single binary input?

I'm trying to convert a 4-digit (decimal) number to binary. My input is a BCD switch (this one). I've been looking to see if I can find either a logic-based circuit or a specific decoder IC to convert ...
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### Single FET Bus Switch schematic in EAGLE

I've added a SN74CBT1G384DBV into my schematic in Eagle (which I want to use to enable/disable a logic signal line). Once placed into the schematic there only appear to be connection points for VCC ...
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### Motor polarity reversing circuit using just SPDT switches

I have a 6v DC motor that controls a physical system similar to a window blind, using one SPDT toggle switch and two SPDT microswitches for control. I have seen similar setups with hoists, however I ...
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### How does the basic RS Flip-Flop (also known as latch) works?

Ok this is a basic question but i am not able to figure out how does this work 1: This is the representation of the RS Flip-Flop with the truth table given in my book I am not able to connect the ...
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### Learning Curve For Microcontroller Programming & Anlog/Digital Electronics? [closed]

What is learning curve for embedded developer in which you can learn with doing small projects? I'm working in a power electronics firm. Our product portfolio is Inverters/Converters, Chargers, AC/DC ...
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### Vegetable oil controller?

So I have been working for a while now on a controller for the vegetable oil system in my vehicle. I am fairly new to programing and am enjoying teaching myself with an arduino. I have an arduino nano ...
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### combinations of binary digits for decimal numbers

Four bits are required to represent the ten decimal digits, and since there are 2^4 combinations of four binary digits, six combinations are not used and the code is said to contain redundancy. The ...
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### Is PIC running at 3.3v, 5V logic tolerant?

Can a micro-controller that is capable of running at voltages ranging from 2.3 to 5.5 V, tolerate 5V logic levels while operating at 3.3V? I need to interface GPS (5V) and raspberry Pi (3.3V) with my ...
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### Flip flop with load/set, reset, clk, and input

I'm not looking for a hardware language description of the flip flop, but the logic gate level to implement. In verilog, the equivalent I'm looking for is ...
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### Async FIFO master / slave

Consider an asynchronous FIFO interface (e.g. FT245, FT2232H or comparable). Since there is no clock, how do you decide who deserved to be called master? Or do you call it controller instead?
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### Convert area of ASIC into kilo-gate equivalent kGE

Is there any resource/datasheet where I can find the kilogate (kGE) of the various CMOS technologies? Essentially, I have a bunch of ASIC circuits with their areas given in mm2 that I want to convert ...
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### How many gates does a 7400TTL decice have? [closed]

How many gates does a 7400TTL decice have? What type of devices inside this chip?
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### Allowing a BJT to turn on and turn off at different set points

simulate this circuit – Schematic created using CircuitLab The circuitry I have on my board currently is the schematic above. It is showing a start up regulator. D1 is an 18V zener, as ...
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### Reset and clock

In digital circuits (combination & Sequential) which input holds more priority clock signal or a reset signal? suppose we give a input reset in an asynchronous counter then reset will wait for ...
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### 9v Power for Digitial Circuit — Parallel or Series Voltage Regulator Split

I'm building a simple project that consists of a 9v LED, a 5v Gas Sensor and a 3.3v micro controller. All the devices have low current draw, so I'm not really worried about hooking them up in ...
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### What if setup/hold time is not violated but data becomes valid outside of the normal data valid window?

Lets look at the latching register in register to register path. Usually there is a skew between the latching register clock and the launching register clock. The latching register clock is delayed in ...
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### What do 2 pairs of three numbers separated by colon mean in SDF files when describing delays of cells?

OK here is an example: ...