Questions tagged [fpga]
A Field-Programmable Gate Array (FPGA) is a logic chip consisting of an array of programmable logic blocks and interconnects that is configured by the customer after manufacturing—hence "field-programmable".
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Why aren't FPGAs ubiquitous?
Reading about FPGAs, if I understand correctly, they are basically fully configurable logic gate circuits. Being this, one can design anything with them. One can design everything in the most ...
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How can an FPGA outperform a CPU?
I hear of people using FPGAs to improve performance of systems that do things like bit-coin mining, electronic trading, and protein folding.
How can an FPGA compete with a CPU on performance when ...
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Can an FPGA design be mostly (or completely) asynchronous?
We had a very short FPGA/Verilog course at university (5 years ago), and we always used clocks everywhere.
I am now starting out with FPGAs again as a hobby, and I can't help but wonder about those ...
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Cheapest FPGAs? [closed]
How cheap do FPGAs get? I know they're more expensive than microprocessors of comparable capability, but I wonder if there exist FPGAs that could contain a Microblaze soft core running Linux, while ...
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How is ASIC design different from FPGA HDL synthesis?
I've had some experience with FPGA/HDL tool suites such as Xilinx ISE, Lattice Diamond, etc. The general workflow is writing Verilog/VHDL, simulation, testing and then programming the FPGA.
I've ...
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FPGA's vs Microcontrollers [closed]
I've worked on the Arduino family (specifically the Sanguino), built a few simple devices and a simple phototrope. I am thus pretty comfortable with microcontrollers - specifically Atmel's. I'm ...
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Readable and educational implementations of a CPU in a HDL
Can you recommend a readable and educational implementation of a CPU in VHDL or Verilog? Preferably something well documented.
P.S. I know I can look at opencores, ...
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What is an LUT in FPGA?
I have gone through various sources... But I am not quite sure what it is.I want an and gate and the logical equivalent is two inputs feeding to one gate and for Y=AB' the logical equivalent is ...
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What is an FPGA?
I've seen a lot of people talking about FPGA's before and I know that it stands for field-programmable gate array but how does it work and what is the purpose of using an FPGA?
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Looking for open source FPGA hardware and dev tools [closed]
Investigated FPGA boards but cannot find open-sourced board and vendor-neutral FPGA development tools:
The ORSoC manufacturer boasts open-sourcing on its website but I cannot really find strong ...
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Why is open hardware so rare? [closed]
I'm trying to understand why open hardware is so much harder to come by than software. I've tried looking around online and I couldn't find as satisfactory explanation.
I understand that hardware is ...
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Are there any Analog FPGAs?
As I understand it FPGAs are flexible "digital" circuits, that let you design and build and rebuild a digital circuit.
It might sound naive or silly but I was wondering if there are FPGAs or other "...
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RTL vs HDL? Whats the difference
What is the main difference between RTL and HDL? To be honest I searched / googled it yet people are divided in their opinions. I remember one saying that HDL is the computer language used to describe ...
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Why are FPGAs so expensive?
I mean compared to ICs (ASICs) with similar complexity, speed etc. Let's compare Ethernet switches to Kintex FPGAs (note that the most expensive switch from the list is circa as expensive as the ...
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When can FPGA's be used and Microcontrollers/DSPs not?
I have to choose between a course on advanced microcontrollers and a course on advanced FPGA's.
I have had introductory courses in both subjects, and what troubles me now is that I am already pretty ...
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What are the differences and similarities between FPGA, ASIC and general microcontrollers?
I have read this post and it does not answer my question in its entirety:
I think of a microcontroller as anything that has some memory, registers, and can process a set of instructions such as LOAD, ...
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Why not implement 1Gbps, when all I need is 20Mbps?
Background
I am working with a client on a large project which requires a custom networking chip to be designed to solve the data transfer requirements within the project. The network is intended to ...
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Can you actually break an FPGA by programming it wrong?
Can you actually break an FPGA by programming it incorrectly?
I'm a software guy really. It's no secret that if your software is wrong, you could destroy all sorts of important data, and perhaps even ...
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FPGA programming, where to begin
I'm a software developer (C, C++, objective-c, java ...) and I am interested in learning to program FPGAs. Now the question may appear simple to you but please do take time to help me on this one as I'...
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Why are FPGAs used so often for HDMI video projects?
If you look through hdmi projects on a site like hackaday, you'll find that just about every one of them involves an FPGA. I don't think I have seen any DIY project with HDMI output that hasn't used ...
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Most affordable FPGA dev kit for learning VHDL and FPGA theory?
I'm looking for something that I can play around with but not spend too much on. I'm not eligible for an academic discount so take that into account when making suggestions.
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VHDL that can damage FPGA
I read somewhere that bad VHDL code can lead to FPGA damage.
Is it even possible to damage a FPGA with VHDL code?
What kind of conditions would cause this and what are the worst case scenarios?
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Why are SRAM based FPGA used more than NVM based FPGA?
SRAM based FPGAs need to load the bitstream again after power off. Meanwhile the Non-Volatile based one don't need that.
I wonder, why are more experiments and security research done on the SRAM ...
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What are the advantages of using FPGAs over TTL in intro computer architecture?
I teach the one and only computer architecture course at a liberal arts college. The course is required for the computer science major and minor. We do not have computer engineering, electrical ...
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What do HDLs compile/synthesize to?
I'm a software engineer. As a programmer, I have an understanding of what my compiler does for me because I've manually written a close textual representation of what it outputs (e.g. assembly). For ...
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When is using latches better than flip-flops in an FPGA that supports both?
The Question:
When is using latches better than flip-flops in an FPGA that supports both?
Background:
It is a well-known principle that level-sensitive transparent latches should be avoided in ...
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Can FPGA out perform a multi-core PC?
I don't understand how FPGA can be used to accelerate an algorithm. Currently I'm running a time consuming real time algorithm on a quadcore laptop so that four computations can be done in parallel.
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Soft core processors vs hard core processors
I am doing a study on FPGA interfacing with microprocessors such as ARM9.
I found the concept of soft core processors and hard core processors in my study. May I know what is the comparison between ...
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Why do FPGA projects always take the same amount of time to compile?
With software, when we compile the project for first time it may take a while but afterwards, it does not take so long anymore. If we change a single file in the project, everything does not need to ...
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How to get a processor design onto FPGA
I recently went on a long voyage of self-teaching logic design. The final product of this is a functional 16 bit CPU that works exactly as designed in a simulator. Now I've just started looking into ...
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Any native Mac OS X environments for getting started with VHDL / FPGAs?
The title pretty much sums up my question: Are there any native Mac OS X environments for getting started with VHDL / FPGAs?
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Soft-CPU verification
I'm currently in the process of designing a simple CPU in VHDL using Xilinx ISE and ISIM. The design portion is going remarkably well, but I can't seem to figure out a way to do verification in a ...
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Entire Perimeter of FPGA Getting Hot - Why?
I have a commercially-produced board with an Altera EPF10K30-series FPGA. There is an abnormally high current draw on the board. Where +5V should be present, there is only +2.6V.
When comparing ...
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Can FPGAs dynamically modify their logic?
It would be theoretically possible for an FPGA to write a configuration image to an external memory, and load the configuration image from the memory to reconfigure itself. This would be "non-dynamic" ...
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Use cases for RAM-less microcontrollers
In a different question around a specific microcontroller (ATtiny12 - datasheet) I came to ask myself: What are the intended use cases for such devices?
Does it target the segment: Too "complex&...
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How to choose an FPGA?
I need to do digital signal processing on 8 analog lines at 10 kHz. This is quite a demanding task, and I was thinking that an FPGA might be the right approach. I am currently looking at dev kits ...
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What happens when an FPGA is "programmed"?
From what I understand, the process of programming an FPGA comes in two parts:
Encode the hardware description into bits that the FPGA can understand (i.e. write some HDL and compile it)
Load the ...
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Why implement microcontroller in FPGA?
I am currently "investigating" FPGAs, what they can do, how they do it etc.
In more than one place (for example here) I have seen projects that implement a simple microcontroller with FPGA.
So my ...
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What's the motivation in using Verilog or VHDL over C?
I come from a programming background and have not messed around too much with hardware or firmware (at most a bit of electronics and Arduino).
What is the motivation in using hardware description ...
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Why is this Verilog RAM modification better in terms of resource usage?
I'm using the open-source toolchain Yosys > NextPnr > IcePack for synthesising code for the Lattice HX8K FPGA. Here's a common version of a 1Kb RAM (that I'm ...
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Project to learn VHDL
I am an EE student and can write [at least simple] programs in more languages than I have fingers. I have just started learning VHDL and I was wondering what a good project would be to really get to ...
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Why are the lookup tables in FPGAs small?
An FPGA can be seen (visually at least) as a matrix of cells. Each cell has a LUT (look-up table) inside, implemented with SRAM and MUX.
Why does the size of such a LUT (and hence of the SRAM) need to ...
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Microcontroller/cpu for fast trigonometry in robot?
This concerns hardware that does weighs little, because a (fat cat sized, 6 legs with 3 DOF) walking robot should carry it around. Because of that walking it'll need to do a lot of trigonometry (using ...
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Receive several fm-radio stations at the same time (~10-20 MHz wide summary at 90MHz radiofrequency)
What is a cheap way to receive and record on PC several (tens) of fm-radios (public, e.g. news, music, etc)? Such radios uses frequencies like 90.4 MHz or 102.7 MHz, sends a stereo (sometimes with ...
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Reset: synchronous vs asynchronous
I've been working with fpgas for years, and always used synchronous resets for every parts (that need it) of my circuits. It helps the circuit to be globally reset at a given clock cycle.
However, I ...
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FPGA development kit for beginners , Spartan6 or Spartan3?
I intend to purchase an FPGA, development kit and I have looked at both the Xilinx and Digilent website. Both seem to have good development kits.
I have never worked with FPGA's before but have some ...
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Data Strobe in DDR memory
In DDR3 memory there is a signal called DQS that I have several question about.
What is DQS abbreviated for? specially Q
What is the purpose of data strobe in DRAM and why not use simple clock.
Is ...
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FPGA CPUs, how to find the max speed?
I'm just getting into FPGAs, and if I understand correctly, you are connecting logic gates together using code. So if I design a CPU in Verilog, it should connect some logic gates together and work, ...
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What microcontrollers with programmable logic built in (FPGA/CPLD like) are available on the market?
Inspired by question I would like to ask what microcontrollers with CPLD or FPGA-like functions build in are available? The most interesting would be low-cost ones in friendly packages (non-BGA). The ...
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FPGA firmware design: How big is too big?
I have a particularly large signal processing transform that needs to be ported from matlab to VHDL. It definitely requires some kind of resource sharing. A bit of calculation gave me the following:
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