Layout is the process of designing a PCB including placement of parts and routing of traces.

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Traces Perpendicular to QFN Pad

Is there any danger (esp. related to manufacturability, or ease of assembly) with running traces out from pads perpendicularly? The part is QFN, and it looks like part of the trace might be covered by ...
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97 views

For a 4 layers PCB (with ground plane), covering with ground polygon on Layer 1&4 necessary?

For a single or double layered PCB board, usually I will cover all the empty spaces in the layout with Ground. This is the 1st time I am designing a 4 layer PCB layout. Layer 1: top signal (high ...
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1answer
69 views

I2C PCB Layout Considerations

I wanted to ask, what general layout guidelines and/or routing concerns exist for I2C in a PCB design? Edit - Consider a 31mil thick, 4Layer PCB with stack up: L1 = signal - 0.5oz + 1oz plating L2 ...
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78 views

PCB Layout and Trace Widths for Buck Converter

I am doing a PCB layout for a simple 12V DC to 5VDC buck converter. The rated output is 3A continuous 5A peak. Here are links to the schematic and first go at the pcb layout. I realize the traces are ...
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72 views

Will the following circuit cause EMI-problems?

I'm trying to get a feel for which circuits will have EMI-problems and which won't. To make things a bit more concrete, I've designed a super-simple LED-blinking circuit using the PIC16F1788 ...
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49 views

Layout of doubled SW pin on buck converter IC

I'm working on a PCB for the MP2617. That IC integrates a buck converter and has two physical SW pins sandwiching the VIN pin, as shown in my tentative layout below. No other pins on the IC are ...
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86 views

PCB layout of buck converter: capacitor placement

I'm designing a PCB for an IC that includes a DC/DC buck converter (MP2617). This is my first PCB, so I've been using the following resources for the layout: 1 and 2 (PDF files, the first one is a ...
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1answer
72 views

PCB chip/trace antenna located away from board edge?

I'm looking to design a system that will require a 2.4GHz antenna. The only problem is, every single reference design I find has the antenna situated on at least one board edge. Unfortunately due to ...
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231 views

PCIe, diagnosing and improving an eye diagram

I have implemented a design that uses PCIe. It is somewhat different in that the PCIe interface is used as a chip-to-chip communication lane on a single PCB (e.g. no PCIe connector). The root ...
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1answer
49 views

Problem with GDS export of a layout in Agilent Advanced System Design (ADS)

I have a problem exporting my layout design in ADS. It gives me an error that the layer map file not found in the library and it creates an empty file. I'd appreciate if you could let me know what ...
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1answer
82 views

Crystal PCB track

This is my current PCB crystal set up. The crystal run at 16 Mhz. Any thoughts/comment? Links: MCU - Datasheet TI PCB guideline Tiva C - Here
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82 views

Can a high current trace be on outer and inner layers at the same time?

EDIT, COMMENTS: TL;DR: Data doesn't conclusively suggest you can do this, but it seems to be worth trying. The data from IPC-2152 (more in the answers below) is intriguing, but doesn't seem to ...
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61 views

Altium Designer - split plane

I want to make a plane for my supply on my PCB and a plane for my MCU to isolate the MCU from the power supply noise. I found this article in Altium designer resource: But it isn't clear how the ...
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2answers
354 views

Weird capacitor looking things shows up in altium when I zoom into the pcb layout

I am using altium for first time for my little circuit project. My layout start showing these weird capacitor looking things in PCB layout. What exactly are they and what are they used for and how do ...
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66 views

Stop mask error upon running DRC in Eagle 7.3.0

I'm working on my first board layout using Eagle (7.3.0). I've got the layout done, but when I run DRC, I get a number of Stop Mask errors: These seem to be due to small rectangles on the tStop ...
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62 views

Opamp constant on

I have a weak signal (from a photo-diode) which I need to amplify to drive an LED. I try to accomplish this with an OpAmp TL081 and the circuit given in the image. What the circuit does: When there ...
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1answer
47 views

Help Duplicating Altium PCB Layout With Different Silkscreen IDs

I have the layout for a 3.3V switching regulator module and I also made a 1.5V switching regulator module. The 3.3V layout is very nicely done and I would like to replicate it for the 1.5V. However, ...
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1answer
23 views

How do I automate the size setting (or any property) of both NAME and VALUE in a PCB BRD file?

I would like to set the size parameter of both value and name of components on a PCB layout to have a readable silk screen. Now it seems that I have to smash everything and go by them one by one. Is ...
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1answer
93 views

How can I create a rectangle drill in Orcad Layout Plus 10.3?

I use Orcad Layout Plus 10.3 for PCB design and I have a problem at this topic. For example, I have to use power jack footprint, I have created but the drill can't be rectangle. I added a screenshot ...
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1answer
80 views

Will an 0603 capacitor fit on an 0805 pad?

I am in a pinch and just submit my final board design to a pcb house. Unfortunately, I messed up the design and had an 0805 pad in a spot where a an 0603 should have been. I will be getting the boards ...
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1answer
37 views

What does 4*1 Panel-up mean?

I believe the number 4 corresponds to the number of individual PCBs and the number 1 is for one panel. Is this the way panelized PCBs are commonly referenced? With an asterisk mark? What does the ...
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1answer
59 views

LDO layout: position of output cap relative to load

simulate this circuit – Schematic created using CircuitLab In above figure, "LDO layout A" and "LDO layout B" are indicative PCB layouts of an LDO - focusing on its output capacitor. ...
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45 views

Purpose of deleting internal PAD

I just learned today that, when you're routing the board you can delete the pad of through hole connectors on the internal layout. Some company even ask to delete all the internal pad that are not ...
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1answer
46 views

Is it a good idea to landfill using alternating power rails?

That is, for example, filling the top layer of a 2-sided board with ground and the bottom with power rail. Will this form a big decoupling cap across the board, or will it give me horrible crosstalk? ...
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113 views

RC low pass filter PCB layout limitation

I have an RC low pass filter for debouncing a GPIO pin. Do I have to place the resistor and the capacitor close to each other? Currently the capacitor is near the GPIO pin, and the resistor can be ...
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360 views

Texas instruments component size

I am about to make a pcb footprint for this package: http://www.ti.com/lit/ml/mpds049b/mpds049b.pdf But I am not sure what the two numbers mean, for example at pin 5 that 0,30/0,15. Are these ...
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113 views

Circuit board layout: wifi ceramic antenna next to a electromechanical relay

Is it okay to place a small ceramic antenna not far from a electromechanical relay? Would the magnetic field generated by the relay coil (when on) affect wifi operation? clarifying edit: not far = ~1 ...
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557 views

PCB layout for high side switch (high current)

I'm working on a PCB layout for two high side switches. You can see below a picture of my current layout. The copper weight of the future PCB will probably be 2 oz/ft² (double sided). I use two ...
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3answers
82 views

What is the easiest way to stagger a signal chain on a stack of identical boards?

I am designing a stack of identical boards that each generate an analog signal. What I am trying to do is take the signal from the board above, mix it with the signal from this board, and then send it ...
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68 views

PADS: Is there an easy way to copy copper pour areas from one design to another?

I'm beginning to hate PADS. It reminds me of autocad. I've got an existing layout containing hatched copper pours. I want to bring the very same copper pours into another design which is a mirrored ...
3
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1answer
100 views

First DDR2 Layout - How much of a data lane must have the same reference?

Doing my first DDR2 layout and I'm hitting some conflicting requirements. I have dogbones to an internal ground-referenced layer, and then short top layer traces at the other end going from the ...
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1answer
50 views

VCC powerplane layout

On a 4 layer stackup with signals routed on top/bottom; 2nd layer VCC powerplane; 3rd layer GND powerplane. How should the VCC powerplane be layed out? Should it be surrounded with a few mm of GND ...
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248 views

How do I overlap wires in OrCAD capture without having the two wires have a node?

I'm doing a schematic for this in OrCAD capture CIS. In laying out my schematic I need to draw one wire going through another wire, but not necessarily intersecting with it via a node. When I drag a ...
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1answer
105 views

How to PCB layout WM7230 MEMS digital microphone?

I'm trying to figure out how I'm supposed to get traces to the four internal data pins of the Wolfson WM7230 Digital Microphone part. It's got a ground ring that is supposed to have a tight solder ...
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1answer
173 views

What is the purpose of curved PCB traces? [duplicate]

I have seen traces like this enough times to begin wondering if there is a purpose and benefit. The only technical explanation I can come up with is that perhaps these curved traces increase the ...
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5answers
425 views

What's your approach when making footprints from a drawing with relative dimensions?

I want to make a footprint for a mini USB connector. Here's the recommended layout from the datasheet: I'm not very experienced with making footprints and find the dimensions inconvenient since ...
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3answers
631 views

Layout of decoupling capacitors

So I've been attempting to create my first development board and layout. I'm first working on the decoupling capacitors, power and ground portions of the layout. The MCU I'm trying to properly ...
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2answers
194 views

SMPS transformer orientation with respect to PCB: what's best for EMC?

I have the option of either using a vertical or horizontal bobbin for a flyback SMPS transformer, and I can't conclusively decide which would be best for minimal radiated interference to be picked up ...
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1answer
245 views

DXF to MAX conversion in ORCAD 10.5

I'm trying to convert my board outline .dxf file to .max for Orcad 10.5. I applied exactly the same steps as described in OrCad Help; however, I obtain nothing but an empty page at the end process. If ...
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1answer
99 views

Why are the USB signal pins always swapped on USB bridges?

So I've been looking around for quite some time for a USB<->UART transceiver that has the pins properly ordered. If you'll look at the picture here, you can see that the pin order of the connector ...
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3answers
160 views

switch mode power supply capacitors

If I am laying out two switch mode power supplies right next to one another from the same supply(24V), one is switching to 5V and the other to 12V then do I need both of the input capacitors? Thanks
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2answers
133 views

Ground island or VCC island under IC

Suppose I have a small (4cmm x 4cmm) 4-layer PCB with standard stack-up of Signal-Vcc-Gnd-Signal. The board is dominated by two QFP-100 (FPGA and uC) on both on top and bottom side of the board with ...
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2answers
103 views

LM1084, should I leave the copper area connected to the TAB floating? [duplicate]

I am using the LM1084 in a DDPAK package as a 5V USB voltage regulator on 4-layer board. The TAB of the package is internaly connected to pin 2 (OUTPUT). I am not sure what to do with the copper ...
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0answers
140 views

What's the best workflow for creating gerber files from, say, an HFSS project?

I am curious how everyone gets their RF/microwave designs from their preferred simulation/design suite (HFSS is just an example) into a gerber file for fabrication. What's a good workflow, including ...
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2answers
222 views

PCB Panelization tool/SW and adding test connections

I prepared 4 different PCB layouts on Eagle CAD and generated Gerber files. As I can see Eagle CAD doesn't have any option to panelization. Is there any free tool/program that can allow me to ...
6
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1answer
266 views

Can Altium do via stitch patterns when interactive routing a group?

I am currently only able to route a group to the next layer with a line of via's like below: I would like to be able to route them something like this: It would really save space but it takes a ...
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177 views

funny shaped footprint pads & PCB123

I am using PCB123 to do a PCB layout and I have a part with some oddly shaped pads specified in the part's recommended footprint. It seems that in the footprint editor, there are only 3 options for ...
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1answer
40 views

Size of passives for active filter

I am working with the CS42436 codec, and in their datasheet, they have recommended values for components to be used in an active filter that takes the differential outputs from the DACs and converts ...
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64 views

Multisim database BOM report problems; alternatives?

For example, we use four parts that are all .1uF 50V capacitors, all with different footprints. They’re electrically the same, so we’d want them to show up on the schematic as “.1uF 50V”. That means ...
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279 views

Expressing a circuit in the form of block diagram [closed]

I am doing an electronics project for 12th grade in electronics.This project is about water level controller.I have component list along with the description and I have soldered the circuit as told.I ...