Layout is the process of designing a PCB including placement of parts and routing of traces.

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41 views

Purpose of deleting internal PAD

I just learned today that, when you're routing the board you can delete the pad of through hole connectors on the internal layout. Some company even ask to delete all the internal pad that are not ...
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1answer
42 views

Is it a good idea to landfill using alternating power rails?

That is, for example, filling the top layer of a 2-sided board with ground and the bottom with power rail. Will this form a big decoupling cap across the board, or will it give me horrible crosstalk? ...
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1answer
64 views

RC low pass filter PCB layout limitation

I have an RC low pass filter for debouncing a GPIO pin. Do I have to place the resistor and the capacitor close to each other? Currently the capacitor is near the GPIO pin, and the resistor can be ...
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2answers
340 views

Texas instruments component size

I am about to make a pcb footprint for this package: http://www.ti.com/lit/ml/mpds049b/mpds049b.pdf But I am not sure what the two numbers mean, for example at pin 5 that 0,30/0,15. Are these ...
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2answers
53 views

Circuit board layout: wifi ceramic antenna next to a electromechanical relay

Is it okay to place a small ceramic antenna not far from a electromechanical relay? Would the magnetic field generated by the relay coil (when on) affect wifi operation? clarifying edit: not far = ~1 ...
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1answer
252 views

PCB layout for high side switch (high current)

I'm working on a PCB layout for two high side switches. You can see below a picture of my current layout. The copper weight of the future PCB will probably be 2 oz/ft² (double sided). I use two ...
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3answers
78 views

What is the easiest way to stagger a signal chain on a stack of identical boards?

I am designing a stack of identical boards that each generate an analog signal. What I am trying to do is take the signal from the board above, mix it with the signal from this board, and then send it ...
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33 views

PADS: Is there an easy way to copy copper pour areas from one design to another?

I'm beginning to hate PADS. It reminds me of autocad. I've got an existing layout containing hatched copper pours. I want to bring the very same copper pours into another design which is a mirrored ...
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1answer
52 views

First DDR2 Layout - How much of a data lane must have the same reference?

Doing my first DDR2 layout and I'm hitting some conflicting requirements. I have dogbones to an internal ground-referenced layer, and then short top layer traces at the other end going from the ...
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1answer
46 views

VCC powerplane layout

On a 4 layer stackup with signals routed on top/bottom; 2nd layer VCC powerplane; 3rd layer GND powerplane. How should the VCC powerplane be layed out? Should it be surrounded with a few mm of GND ...
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2answers
92 views

How do I overlap wires in OrCAD capture without having the two wires have a node?

I'm doing a schematic for this in OrCAD capture CIS. In laying out my schematic I need to draw one wire going through another wire, but not necessarily intersecting with it via a node. When I drag a ...
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1answer
55 views

How to PCB layout WM7230 MEMS digital microphone?

I'm trying to figure out how I'm supposed to get traces to the four internal data pins of the Wolfson WM7230 Digital Microphone part. It's got a ground ring that is supposed to have a tight solder ...
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1answer
108 views

What is the purpose of curved PCB traces? [duplicate]

I have seen traces like this enough times to begin wondering if there is a purpose and benefit. The only technical explanation I can come up with is that perhaps these curved traces increase the ...
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5answers
325 views

What's your approach when making footprints from a drawing with relative dimensions?

I want to make a footprint for a mini USB connector. Here's the recommended layout from the datasheet: I'm not very experienced with making footprints and find the dimensions inconvenient since ...
3
votes
3answers
413 views

Layout of decoupling capacitors

So I've been attempting to create my first development board and layout. I'm first working on the decoupling capacitors, power and ground portions of the layout. The MCU I'm trying to properly ...
3
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2answers
107 views

SMPS transformer orientation with respect to PCB: what's best for EMC?

I have the option of either using a vertical or horizontal bobbin for a flyback SMPS transformer, and I can't conclusively decide which would be best for minimal radiated interference to be picked up ...
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1answer
120 views

DXF to MAX conversion in ORCAD 10.5

I'm trying to convert my board outline .dxf file to .max for Orcad 10.5. I applied exactly the same steps as described in OrCad Help; however, I obtain nothing but an empty page at the end process. If ...
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1answer
80 views

Why are the USB signal pins always swapped on USB bridges?

So I've been looking around for quite some time for a USB<->UART transceiver that has the pins properly ordered. If you'll look at the picture here, you can see that the pin order of the connector ...
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2answers
110 views

switch mode power supply capacitors

If I am laying out two switch mode power supplies right next to one another from the same supply(24V), one is switching to 5V and the other to 12V then do I need both of the input capacitors? Thanks
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2answers
95 views

Ground island or VCC island under IC

Suppose I have a small (4cmm x 4cmm) 4-layer PCB with standard stack-up of Signal-Vcc-Gnd-Signal. The board is dominated by two QFP-100 (FPGA and uC) on both on top and bottom side of the board with ...
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2answers
87 views

LM1084, should I leave the copper area connected to the TAB floating? [duplicate]

I am using the LM1084 in a DDPAK package as a 5V USB voltage regulator on 4-layer board. The TAB of the package is internaly connected to pin 2 (OUTPUT). I am not sure what to do with the copper ...
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0answers
102 views

What's the best workflow for creating gerber files from, say, an HFSS project?

I am curious how everyone gets their RF/microwave designs from their preferred simulation/design suite (HFSS is just an example) into a gerber file for fabrication. What's a good workflow, including ...
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2answers
153 views

PCB Panelization tool/SW and adding test connections

I prepared 4 different PCB layouts on Eagle CAD and generated Gerber files. As I can see Eagle CAD doesn't have any option to panelization. Is there any free tool/program that can allow me to ...
6
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1answer
196 views

Can Altium do via stitch patterns when interactive routing a group?

I am currently only able to route a group to the next layer with a line of via's like below: I would like to be able to route them something like this: It would really save space but it takes a ...
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142 views

funny shaped footprint pads & PCB123

I am using PCB123 to do a PCB layout and I have a part with some oddly shaped pads specified in the part's recommended footprint. It seems that in the footprint editor, there are only 3 options for ...
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1answer
37 views

Size of passives for active filter

I am working with the CS42436 codec, and in their datasheet, they have recommended values for components to be used in an active filter that takes the differential outputs from the DACs and converts ...
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53 views

Multisim database BOM report problems; alternatives?

For example, we use four parts that are all .1uF 50V capacitors, all with different footprints. They’re electrically the same, so we’d want them to show up on the schematic as “.1uF 50V”. That means ...
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1answer
240 views

Expressing a circuit in the form of block diagram [closed]

I am doing an electronics project for 12th grade in electronics.This project is about water level controller.I have component list along with the description and I have soldered the circuit as told.I ...
4
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1answer
91 views

Critique of SMPS layout

Can you guys provide some feedback on my layout for this TP562200 buck regulator? I'm using it to take a ~12V and drive a servo. The supplied resistor values should provide about 5.1V, which is within ...
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1answer
585 views

Cadsoft EAGLE Some objects extend outside the allowed board area

I'm trying to Modify an eagle file that I have, it's a relatively simple circuit and I'm using the free version of Cad soft Eagle to do it. One of the components on the board is a 4 pin plug, I'm ...
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145 views

NOT consistent Euler Paths in logic diagram. What now?

i'm working with non-series-parallel arrangements, something like this: as you can see, the euler paths in pull-up and pull-down are differents. for example, in pull-up we have "abcde" and in ...
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1answer
81 views

Oscillation on an 4 phase 12 to 24V 20A boost inverter

Oscillation on an 4 phase 12 to 24V 20A boost inverter I’m using 2 pieces of LTC3787 to make a 12-24V inverter. I made a 4 layer board from it to have enough ground to make sure all will be stabile. ...
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1answer
161 views

Spark Core Shield PCB design review

I'm designing a PCB (a shield for Spark Core - microcontroller + wifi board). It is connected to 5 analog sensors (not on board, using 3pin header) and 4 relays (on board). Output(RJ45) and vias on ...
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3answers
304 views

PCB RF Layout Critique: Input on my radio-telescope PCB

I'm attempting to do the board layout for a radio-telescope we're building at one of my jobs. Here is the overall system topology: QRFH is for "Quad Ridged Feed Horn". It's a rather esoteric ...
2
votes
1answer
96 views

27512 pinout and PCB layout

I'm trying to design PCB traces for a 27512 EPROM chip. But its pinout for the higher half of the address bus seems completely illogical to me and I cannot imagine how should I lay out my traces for ...
2
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1answer
102 views

Stripline reference plane discontinuity in reference design

According i.MX6 SMART DEVICE SYSTEM of freescale layout board, it uses 8 layers, my question is about the inner layers, they are striplines with a continuos GND plane in one side but in the other side ...
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118 views

LPC1768 LQFP package outline and footprint solder pads

I was double checking footprints of my design before I send it to prototype manufacturing. When I check LPC1768 package outline and footprint I saw that first solder pads on every corner is wider ...
3
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1answer
174 views

Ground and power PCB layout for MCU

As you know most of the MCU's has several Vdd and Vss pins. In the case of two-layer PCB it seems convenient to use some polygons beneath MCU (like on the figure below). The first option is treat the ...
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2answers
186 views

How do I make multiple connections to a microcontroller's GND/VCC etc?

If I'm hanging a number of switches and potentiometers and other sensors off a single microcontroller, I need to connect multiple wires to the µc's ground and VCC pins. What's the best way to do ...
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2answers
359 views

High EMI PCB track under transistor or diode package

Can a high EMI PCB track under a transistor or diode package (in this case TO247AC) be a problem? To get a better understanding: Is there any advantage on putting these tracks on the other side ...
3
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2answers
320 views

Learning PCB Layout Strategy

A number of projects I have been working on have outgrown the breadboard phase, and I have been learning how to do PCB layout. My first tiny project (a cable adapter) went smoothly, but as I have ...
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1answer
296 views

DDR bus design review

In our last build we had issues with DDR stability in our prototype, simply because of lack of experience with this type of high speed memory connections. We managed to get it working with halving the ...
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1answer
401 views

How to route to a hidden pin in Altium

I'm using Altium Designer 14.2.3 and I have a connector on which are always two pins connected to each other. In my schematic library I have configured the Pins to be hidden and connected to the ...
5
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3answers
241 views

Should you try and minimize via quantity?

I have a 6.5" x 4.5" double sided board that is mixed analog and digital. I have partitioned the analog and digital grounds from each other and have zero ohm resistors that bridge the two grounds ...
3
votes
1answer
132 views

What does “50 ohm system” mean?

I'm looking to use the following switch to switch an SPI bus ( CLK <= 2Mhz) between two different devices. I'm reading the datasheet to see if the the frequency of the signals are going to be ok, ...
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1answer
1k views

Proteus/Ares - how to scrap old layout but keep Isis schematic

I have got in a mess on the layout. I want to scrap the existing layout and restart with a new board size. How do I do that without restarting the entire project?
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120 views

Integrated Circuit Multiplier Circuit Problem

I'm developing an 8bit x 8bit IC signed multiplier using FULL adder cells. Once I get partial products, I add them together. The problem I have occurs in this stage, adding of the products. This is ...
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1answer
70 views

Cadence SoC encounter

I am trying to create the layout of my design for an 8 bit multiplier accumulator in SoC Cadence encounter tool. After routing the design using wroute command, the ...
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1answer
288 views

PCB layout for 8-16MHz crystal very near WiFi module AND small DC motor

I'm designing an "Internet of Things" appliance where space and layout are constrained by mechanical and cost requirements. The main processor is a PIC18 and its crystal (probably 8MHz, maybe 16) is ...
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2answers
906 views

1bit Full Adder Cell in IC not working as supposed?

I got an adder cell, which in IC mirror layout is this: EDIT: Transistor-level, standard adder circuit: Which I actually made in IC like this: It's not working as it should! I labelled it ...