Layout is the process of designing a PCB including placement of parts and routing of traces.

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funny shaped footprint pads & PCB123

I am using PCB123 to do a PCB layout and I have a part with some oddly shaped pads specified in the part's recommended footprint. It seems that in the footprint editor, there are only 3 options for ...
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1answer
28 views

Size of passives for active filter

I am working with the CS42436 codec, and in their datasheet, they have recommended values for components to be used in an active filter that takes the differential outputs from the DACs and converts ...
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25 views

Multisim database BOM report problems; alternatives?

For example, we use four parts that are all .1uF 50V capacitors, all with different footprints. They’re electrically the same, so we’d want them to show up on the schematic as “.1uF 50V”. That means ...
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94 views

Expressing a circuit in the form of block diagram [closed]

I am doing an electronics project for 12th grade in electronics.This project is about water level controller.I have component list along with the description and I have soldered the circuit as told.I ...
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1answer
67 views

Critique of SMPS layout

Can you guys provide some feedback on my layout for this TP562200 buck regulator? I'm using it to take a ~12V and drive a servo. The supplied resistor values should provide about 5.1V, which is within ...
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1answer
109 views

Cadsoft EAGLE Some objects extend outside the allowed board area

I'm trying to Modify an eagle file that I have, it's a relatively simple circuit and I'm using the free version of Cad soft Eagle to do it. One of the components on the board is a 4 pin plug, I'm ...
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23 views

NOT consistent Euler Paths in logic diagram. What now?

i'm working with non-series-parallel arrangements, something like this: as you can see, the euler paths in pull-up and pull-down are differents. for example, in pull-up we have "abcde" and in ...
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1answer
54 views

Oscillation on an 4 phase 12 to 24V 20A boost inverter

Oscillation on an 4 phase 12 to 24V 20A boost inverter I’m using 2 pieces of LTC3787 to make a 12-24V inverter. I made a 4 layer board from it to have enough ground to make sure all will be stabile. ...
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1answer
109 views

Spark Core Shield PCB design review

I'm designing a PCB (a shield for Spark Core - microcontroller + wifi board). It is connected to 5 analog sensors (not on board, using 3pin header) and 4 relays (on board). Output(RJ45) and vias on ...
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3answers
211 views

PCB RF Layout Critique: Input on my radio-telescope PCB

I'm attempting to do the board layout for a radio-telescope we're building at one of my jobs. Here is the overall system topology: QRFH is for "Quad Ridged Feed Horn". It's a rather esoteric ...
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1answer
64 views

27512 pinout and PCB layout

I'm trying to design PCB traces for a 27512 EPROM chip. But its pinout for the higher half of the address bus seems completely illogical to me and I cannot imagine how should I lay out my traces for ...
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1answer
67 views

Stripline reference plane discontinuity in reference design

According i.MX6 SMART DEVICE SYSTEM of freescale layout board, it uses 8 layers, my question is about the inner layers, they are striplines with a continuos GND plane in one side but in the other side ...
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48 views

LPC1768 LQFP package outline and footprint solder pads

I was double checking footprints of my design before I send it to prototype manufacturing. When I check LPC1768 package outline and footprint I saw that first solder pads on every corner is wider ...
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1answer
97 views

Ground and power PCB layout for MCU

As you know most of the MCU's has several Vdd and Vss pins. In the case of two-layer PCB it seems convenient to use some polygons beneath MCU (like on the figure below). The first option is treat the ...
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2answers
165 views

How do I make multiple connections to a microcontroller's GND/VCC etc?

If I'm hanging a number of switches and potentiometers and other sensors off a single microcontroller, I need to connect multiple wires to the µc's ground and VCC pins. What's the best way to do ...
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236 views

High EMI PCB track under transistor or diode package

Can a high EMI PCB track under a transistor or diode package (in this case TO247AC) be a problem? To get a better understanding: Is there any advantage on putting these tracks on the other side ...
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2answers
215 views

Learning PCB Layout Strategy

A number of projects I have been working on have outgrown the breadboard phase, and I have been learning how to do PCB layout. My first tiny project (a cable adapter) went smoothly, but as I have ...
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197 views

DDR bus design review

In our last build we had issues with DDR stability in our prototype, simply because of lack of experience with this type of high speed memory connections. We managed to get it working with halving the ...
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1answer
129 views

How to route to a hidden pin in Altium

I'm using Altium Designer 14.2.3 and I have a connector on which are always two pins connected to each other. In my schematic library I have configured the Pins to be hidden and connected to the ...
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3answers
182 views

Should you try and minimize via quantity?

I have a 6.5" x 4.5" double sided board that is mixed analog and digital. I have partitioned the analog and digital grounds from each other and have zero ohm resistors that bridge the two grounds ...
3
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1answer
89 views

What does “50 ohm system” mean?

I'm looking to use the following switch to switch an SPI bus ( CLK <= 2Mhz) between two different devices. I'm reading the datasheet to see if the the frequency of the signals are going to be ok, ...
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1answer
230 views

Proteus/Ares - how to scrap old layout but keep Isis schematic

I have got in a mess on the layout. I want to scrap the existing layout and restart with a new board size. How do I do that without restarting the entire project?
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81 views

Integrated Circuit Multiplier Circuit Problem

I'm developing an 8bit x 8bit IC signed multiplier using FULL adder cells. Once I get partial products, I add them together. The problem I have occurs in this stage, adding of the products. This is ...
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53 views

Cadence SoC encounter

I am trying to create the layout of my design for an 8 bit multiplier accumulator in SoC Cadence encounter tool. After routing the design using wroute command, the ...
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1answer
210 views

PCB layout for 8-16MHz crystal very near WiFi module AND small DC motor

I'm designing an "Internet of Things" appliance where space and layout are constrained by mechanical and cost requirements. The main processor is a PIC18 and its crystal (probably 8MHz, maybe 16) is ...
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2answers
358 views

1bit Full Adder Cell in IC not working as supposed?

I got an adder cell, which in IC mirror layout is this: EDIT: Transistor-level, standard adder circuit: Which I actually made in IC like this: It's not working as it should! I labelled it ...
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1answer
141 views

Integrated Circuit Layout Design - Dynamic Flip Flop?

I need to create a dynamic flip flop like this: In integrated circuit technology, at mask layout level. I then want to create an 8bit register, using 8 of these flip flops, with a common CLK ...
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438 views

Designing for High Acceleration

I'm looking into designing a board for a robotics application that is going to be spinning very quickly, and am wondering if there is anything special to take into account. It's going to be in the ...
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125 views

Orcad Layout plus 10.5 RCA Footprint

I am new to Orcad 10.5 and I am designing a PCB. I used an RCA jack in my project but I can't find an RCA package in Layout Plus. Can you help me with this problem?
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56 views

Layout and Capacitance of 24/12 Inverter

Consider below layout: It is brought from CMOS VLSI Design Book by West-Harris. Why it is called 24/12 lambda inverter? I could not estimate its width/length so it match 24 and 12. Why its ...
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2answers
283 views

Power Resistor TO-263 in Layout (Eagle) [duplicate]

I am using this Power Resistor here and I am trying to put it in my layout. The Problem is I can't find any .lib (TO-263 or D2PK) file in Eagle or at least a similar package. Any Help?
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113 views

How to connect GND and AGND planes on an inner layer in eagle?

This is an follow-up question to "How do I facilitate keeping multiple grounds, (i.e. AGND, DGND, etc…) separated in the layout when using Eagle?" I like the idea of using a "virtual short" component ...
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81 views

Building a SMT footprint for a MSOP

I'm putting together a board and it's requiring a footprint for a 16 lead Plastic MSOP. Usually I try to dig around and find a manufactures recommended footprint and try to stick with that. I figure ...
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169 views

SFH6916— SOP-16, Half Pitch Mini-Flat Package eagle library needed

I want to use SFH6916 ( Optocoupler, Photo-transistor Output, Quad Channel, SOP-16, Half Pitch Mini-Flat Package) in my circuit. I am using Cadsoft Eagle for layout designing. The package ...
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1answer
185 views

Would I need a star topology with a dedicated ground plane?

Some background: I have a PCB with a bunch of relays on it. The purpose of the circuit, is to allow signals to pass through from one connector to another (db37), or to stop it - that's where the ...
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1answer
320 views

Crystal, PCB Layout

I've completed a few circuit board layouts before, however this is my first time doing a layout with a oscillator/MCU. After doing some reading (via this site and datasheets) I've come up with the ...
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2answers
107 views

differences between different footprint surface mount RLC components

This is my first question here and I am new to board level digital design(I have years of experience on programming development boards though). So here is my question, what are the differences ...
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2answers
147 views

What tool can make a nice 3D image of a via?

I found this graphic somewhere on the web, but now I need to create a similar illustration for some training, but with a 16 layer board having traces coming in on other layers etc. What is the ...
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1answer
938 views

Choosing a SDRAM pcb layout

I'm working on a project with the quite new STM32F429 in LQFP208 package. I need to solder the first couple of prototype by myself for low budget reason. I choose this package so I could check myself ...
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50 views

Difference between MIL and IPC footprints

I've always noticed the different MIL and IPC footprint libraries in CAD tools. Usually, the pads are slightly different sizes. What is the reason for the difference? Tolerance? Quality assurance?
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1answer
147 views

Return Paths of Parallel FETs

I'm attempting to design an H-Bridge which can supply 24V at 60A. As 60A is a lot of current I decided to parallel upto 4 FETs per leg to split the current. I am using a MIC4102 2A driver to drive ...
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1answer
2k views

Can Proteus Isis open Eagle's schematic?

I had some years working with Proteus PCB design. A few years then, I did not do the same work. Now, from Googling, electronics community seem to place Eagle in a dominating position. Sparkfun, ...
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126 views

Explain Orcad Layout Plus 9.2 Layers?

There are total 18 layers in Orcad Layout Plus 9.2 Can someone explain me the purpose of these layers? Which layers are neccessary when making a via? Thanks!
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1answer
470 views

(Layout Plus 9.2) How to copy a part from one MAX file to another

I have a Layout Plus 9.2 file. I want to copy some components on it to another file (I don't have component library). How can I export those components to a new library? How can I copy them to a new ...
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79 views

Eagle: Circular area under component colliding with traces

I am creating a PCB layout in Eagle and I noticed that when I add in the ground plane, there are two unfilled circular areas under the usb mini type B socket. Does that area need to be empty? I ...
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2answers
204 views

Component libraries for schematic and layout design

I've got much difficulties to find the footprint for the components I have in hand: They don't have name (I buy them at somewhere similar to flea markets). Therefore, their proper footprints are ...
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2answers
162 views

Eagle converts board to schematic

There are times that a design is given constraints in the placements of components. For me, I would like to start from placing them first before creating the schematic. Is there such a capability in ...
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2answers
878 views

Minimizing Ringing in a H-Bridge

I am designing a H-Bridge based DC-DC Converter that boosts 24V to 350V DC. I use a HF transformer at the output of the H-Bridge for the actual boost. The circuit works OK for a while and then the IC ...
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112 views

PCIe branching - Requirement of Switch

Considering the following scenario: A designer wants to connect 3 devices on a PCIe x4 finger edge connector, commonly found on mother boards. All 3 devices will be populated on the same PCIe card. ...
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318 views

Changing pad shape/size selectively on an inner layer in Eagle

I'm trying to create a plated cutout in eagle for a DC barrel jack connector (https://www.sparkfun.com/datasheets/Prototyping/Barrel-Connector-PJ-202A.pdf) for a 4 layer board to be fabed by oshpark. ...