Consider instead more specific tags, e.g., dram, sram, flash

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241 views

Designing an 8 x 3 memory chip given 2 4 x 3 chips

I'm working on a problem that asks me to design an 8 x 3 memory chip given 2 4 x 3 memory chips. I'm not sure how to approach this problem. I've looked at the textbook and found various online ...
1
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1answer
72 views

Sram in the ARM cortex m3

I load a project into the chip STM32f103ZC whose internal sram is 48kBytes , there are also 2MBytes external sram on the board. But when I download and debug the project,the map file tells that ...
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0answers
23 views

EMMC memory vs SD memory

I have an embedded application in which I intend to create a database in an external storage. The MCU will be a low power Cortex M4 such as TIVA 129X. I am interested in the types of memory I should ...
0
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1answer
27 views

Determine the PROM programming pattern for the memory system using TPB28L42, 512x8 PROM as an address decoder

Question The following figure shows a memory system using the TPB28L42, 512x8 PROM as an address decoder. Determine the PROM programming pattern for the circuit. My Problem My ...
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1answer
31 views

Memory address 32-bit

I'm working with a Zedboard and I'm printing to the screen memory addresses of consecutive 32-bit float numbers. So the print generates this: ...
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22 views

random null pointer errror in ARM IC

Our develop board sometimes met null pointer errors and then system hang, we are sure it's not a software problem, but a hardware issue. It maybe memory corruption or cache problem or something else. ...
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0answers
20 views

what is the order of bandwidth of cache memory

I am developing a C program to calculate the bandwidth, latency and size of a cache memory L1, L2, L3. My calculation gives a bandwidth of some Gigbytes/second. I am wondering if my calculation is ...
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0answers
16 views

Transfer time of a file to hard drive [migrated]

I need to understand the role of the memory size in the computer when we need to copy a large amount of data to a hard drive, for example a file of 50 GB. Suppose that we have a hard drive of 180 GB ...
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1answer
16 views

What is the difference between a virtually tagged and a physically tagged memory system?

I study computer architecture and this question came. What is the difference between a virtually tagged and a physically tagged memory system?
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30 views

Can't Search for specific value at RAM - verilog

My module has search for specific value at RAM and then return its location address. when I wrote a test bench, I see that the module didn't work correctly! always the output value is "don't care". ...
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1answer
33 views

searching in memory at verilog

I need to make a module which responsible to search overall memory to find a specific value and return the address location, but I have the following error after do Synthesize in Xilinx. ...
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0answers
41 views

How to know the memory occupied by the various memory segments in a microcontroller

I'm using STM32 based microcontroller, IAR embedded workbench and STlink v2 debugger. I just want to know how to check the memory utilized/used by the program/system in various memory segments like: ...
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2answers
191 views

When looped, memory address not being displayed sequentially while skipping intermediate memory

I am trying to run through a sequence of memory and display it on the command window. Here is the code: ...
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2answers
70 views

Will reading serial flash memory wear it out?

I know that a flash memory has limited write cycles. Does it also have limited read cycles? Datasheets of most serial flash memories (like SST25VF series) mention endurance cycles. Does this ...
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1answer
25 views

LPM equivalent for ATtiny10?

I would like to load some data from the program memory (e.g. a sine table) on my t10. Like on other AVRs the lpm command is for that purpose but it seems not to exist on the t10. I saw this crazy ...
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4answers
513 views

SRAM swapped address / data bits

Consider the following wiring from a microcontroller to a sram chip: ...
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0answers
39 views

DIY dual/hybrid pendrive

I have couple of damaged old pen drives lying around. The damage is related just to their fragile USB ports and adding a new port makes them work as new. Now since I am severing some cheap micro USB ...
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0answers
13 views

Process technology of Micron Parallel NOR Flash memory M29F200FT/B

I need to learn process technology of the part I stated in the title. Is it micron or nanometer? I am calling micron and the representative can't find anyone to answer my question. They forwarded me ...
3
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1answer
72 views

Hitachi HD44780 LCD works exactly 50% of the time

My Hitachi LCD works 50% of the time. Is it a problem is a deboucing reset button issue on the AVR? Why is this happening? Here's a video of what is happening. This does not happen if I write on the ...
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1answer
285 views

STM32 SPI Peripheral bug?

I'm using STM32F051R8T6 on STM32F0-Discovery board and M25P80 flash IC as a peripheral. I've got the SPI configured in 3-line (+ 1 software chip select line), full-duplex mode and I'm using polling to ...
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1answer
66 views

8051 micro controller on chip ROM address range? MEMORY SIZE

what is the size for each of these chip ? I know that when we add 1 bit to the memory we double the size. my question is what is the size for a chip range from (0FFF - 0000) so that i keep doubling ...
3
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1answer
76 views

What happens when VRAM fails?

When VRAM fails within a video device, there appear to be certain common patterns of visual artifacts. This got me thinking - when VRAM (and RAM in general) fails, what is it that's actually happening ...
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1answer
36 views

Interfacing 6116 RAM to a data bus

I have a question about interfacing IDT6116SA15TPG SRAM to a tri-state data bus controlled by 74LS244 tri-state buffer. I could not find an old memory like 74LS289 with separated inputs and outputs. ...
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2answers
98 views

EEPROM Write Cycle Time and Write Cycle Endurance

I have an embedded software application that is copying a buffer from RAM to EEPROM. In this case, the EPROM device is a 28C010 (128K x 8). The copying is done at non-regular intervals, generally in ...
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1answer
81 views

Why DIMM has 64 bit data width?

Wikipedia’s definition of DIMM says: Most DIMMs are built using "×4" ("by four") or "×8" ("by eight") memory chips with nine chips per side; "×4" and "×8" refer to the data width of the DRAM chips in ...
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1answer
66 views

Fundamental reason why RAM is faster then second storage device

Let's consider dynamic RAM - 1 cell = capacitor+ transistor and second storage device, - for example ordinary mmc NAND flash. DRAM, so called volatile memory, need to be refreshed to keep capacitors ...
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1answer
78 views

STM32 memory page size

I can't find the size of a page of memory in an STM32L0 (specifically STM32L053R8, see DocID 025844). I don't see a referenced as to the size of a page of memory. Note: This is also in reference to ...
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1answer
69 views

read all of 256MB NOR flash, but only erase first 139MB from Linux - uboot is all good [closed]

Background: I recently upgraded my 64 MB NOR flash on my PowerPC (P2020) embedded board to a 256 MB NOR flash. (The board has 2 GB of DDR RAM.) I had to decrease the page offset to provide enough ...
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1answer
173 views

problem with making 1 bit RAM memory using transistors?

I'm trying to make 1 bit RAM using four transistor ( 2 NOR Gates ). I built the 2 copies of the following circuit: I connected a LED to the output "F". Also, I connected Another LED to the output ...
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56 views

Why is asynchronous NAND negatively affected by compressed data in SSD benchmarks

Over the last year, the Kingston V300 SSD received lots of flack for having good benchmark scores but poor real world performance. PC building enthusiasts point the gun to Kingston's benchmark tool ...
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0answers
47 views

What is DRAM atom size? Does it have any relation to the channel size?

I have seen that the channel size is in bits (64b/128b) which I understand is the amount of data one channel can transfer at an edge. But I see that the atom size is in Bytes. So does an atom of ...
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2answers
157 views

How to calculate address range of memory chips

Hi I am not an Electrical Engineer but need to know something about Memory address ranges. I need to calculate address range of each memory chip(62256) from let suppose bank 1 in below diagram. How ...
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1answer
54 views

AVR local and global variable program size

I work on ATmega8 and I need to optimize my code as well as I can, because I am over limit and I saw something surprising. I have a few 8bit integers declared as global variables and a few 8bit ...
8
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4answers
442 views

What happens when microcontrollers run out of RAM?

It may just be a coincidence but I've noticed the microcontrollers I've used rebooted when they ran out of RAM (Atmega 328 if hardware specific). Is that what microcontrollers do when they run out of ...
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34 views

USB 3 Flash Memory

What chip configurations are in these new USB 3 keysticks that are achieving >100mb/s write and >200mb/s read speeds?
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1answer
80 views

SPICE model of DRAM

Is there a SPICE model for DRAM developed? I am interested in any type of model at any level starting from DRAM memory cell and towards to whole memory VLSI circuit. I am seeking for a DRAM operation ...
0
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1answer
80 views

How does Xilinx MIG AXI interface map to DDR PHY pinout?

At the bottom of page 156 of UG586 I can understand how the User Address maps to the PHY pinout. However, I can't understand page 155 of the same manual. How does the 32-bit Microblaze address space ...
0
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1answer
198 views

Determining memory address width from memory size

Given a computer A with 1024 x 16 memory and a computer B with 16K x 32 memory, how big are the registers of an Accumulator, program counter, instruction, temporary register, address register, data ...
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2answers
118 views

In an SDRAM how do address rows/columns and rank width and bank width relate to the total memory size?

I have a Micron SDRAM (MT16KTF1G64HZ-8GB). The size of the memory is 8GB. I did some calucaltions and 8GB of data means 2^36 bits capacity. Now when I look in the Micron data sheet, the row address is ...
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0answers
136 views

How to quickly fill up the entire DDR memory using Xilinx tools?

I have a board with a DDR3 memory and a Virtex 7 FPGA. I have used Xilinx MIG to create a memory controller and I am able to succesfully read/write to the memory using Microblaze registers. I would ...
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0answers
71 views

Calculate Instructions per second MIPS

I'm trying to solve this problem for a MIPS processor: Suppose the data cache is perfect but the instruction cache has a 5% miss rate. On a cache miss, the processor stalls for 20 ns to access main ...
0
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1answer
62 views

How many NAND flash chips (measured in Gb) are required for a 32GB USB drive? What is the economic relationship between the two?

NAND Flash Contract Price http://www.insye.com/dp/NANDFlashContractPrice.aspx Context, I am purchasing about 200k USB drives. I sent it out to competitive bid but I want greater insight into the BOM ...
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0answers
51 views

AT91SAM9260 Does not recognize 128 MBytes SDRAM

Recently began to use AT91SAM9260 processor on the Olimex board. From the data sheets of the processor, it seems to support up to 256 MBytes of SDRAM. So I replaced both of the old K4S561632C-TC/L75 ...
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2answers
81 views

Verilog module to read/write a register

I would like to create a module that can change the value of a register passed to it (+/- 1) using an inout port. I wrote this: ...
14
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4answers
2k views

How do you determine how much flash/RAM you need for a microcontroller?

Let's say you are starting an embedded project with some known functionality. When you select a microcontroller how do you select how much RAM you need? Do you use a developer board and code your ...
0
votes
1answer
261 views

Implementing Processor Core for Cache Module in Verilog

I have written a simulation module for a Direct Mapped Cache (consisting of data, tag, and valid rams and cache controller) in Verilog. I now want to implement a Processor Core/Driver (also in ...
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1answer
57 views

Small system on a chip : Power consumption [closed]

This question is lying somewhere between electrical engineering and computer science, however I felt that this forum suited my question the best. I post this question because I feel that this kind of ...
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2answers
611 views

Constructing decoder 5/32 using smaller ones, without enable

I need to construct a decoder 5/32 using any number of 2/4 and 3/8. How do I start? With Enable it's not hard to figure out, but without them it gets complicated. Advice?
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1answer
56 views

Estimating processing power required

I am currently in a computer engineering class and I have been asked to design a product that can guide blind people. In my fictitious product I am going to implement a module to detect distances (a ...
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2answers
84 views

Series Termination DDR

I was Going through some application notes for the placement of Series termination of DDR and found it should be placed near to the processor. But if I am not wrong termination resistor are placed to ...