A n-channel metal-oxide semiconductor (nMOS) transistor has n-type carriers in the channel. A positive voltage on the gate turns inverts the substrate (PWell) creating the channel and turning the device on. The term may also be used to describe logic circuits built around nMOS transistors.

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183 views

Why is CMOS fall time faster than rise time?

I've just started a computer architecture class, and the slides from a lecture says that the reason why fall time is faster than rise time is that the NMOS electrons have more mobility than PMOS which ...
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0answers
14 views

PMOS bulk voltage affect NMOS V_t

I am using a MOSFET in a IC (CD4007), only the NMOS in the IC. Then, I want to know the parameters, \$ k_n\$, \$W\$, \$L\$ and \$ V_t \$, for this, I using a method for characterize the NMOS. The ...
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1answer
61 views

NMOS and PMOS current sources

I'm really confused with the representation of PMOS device shown in the figure. Since conventional current direction in PMOS is from source to drain, shouldn't the current source be pointing ...
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3answers
56 views

Single MOSFET Amplifiers

Why is it that when I see single MOSFET amplifiers or even complementary ones (one NMOS and PMOS), they would use what in single BJT amplifiers would be called "Common Emitter Amplifier". The output ...
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49 views

Capacitor discharging problem

[enter image description here][2] I have simulated the circuit in pspice...it is giving good result....but when v2 is low then both transistors are working so output capacitor should not ...
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45 views

Power consumed by an nmos

When an nmos is conducting is modeled by a resistor but are other parasitic elements like capacitor comes into play in the calculation of power consumption??which one is better enhancement type or ...
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1answer
34 views

Enhancement type nmos threshold voltage

in an enhancement type nmos when a channel is created then a depletion layer should be created under the n-channel which means electrons get a potential barrier to overcome.now is this potential ...
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1answer
45 views

Finding 2nd Vds value in a NMOS circuit

I think for the first part of this problem I solved for Ra = 13kohm and Rb = 7kohm, but I'm not able to understand or see how to get the voltage at the point V1. Any idea on how to go about finding ...
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1answer
46 views

Depletion NMOS that's saturated at 0V

May seem like a weird request for a part, but are there any Depletion NMOS out there that is already saturated when you apply 0V to gate or if the gate is not connected?
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2answers
74 views

Help with MOSFET buck converter

I've started learning about Buck Converters, and I made a miniature one on an Arduino prototype shield. But when I turn the thing on, the voltage is stuck at 5v (the voltage input). I tried ...
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0answers
44 views

NMOS open drain output vs PMOS open drain output

I'm reading HT1632C LED driver datasheet and it has on the first page in the features section: Selectable NMOS open drain output driver and PMOS open drain output driver for commons Does it ...
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1answer
54 views

what would the drain voltage be if NMOS source voltage is not ground?

Hi I'm a beginner trying to learn CMOS cuicuit. Let's say we have two NMOS connected as shown. Given: A, B, C are connected to Vdd = 5V; VtM1 = 0.6V is the threshold voltage of M1; VtM2 = 0.5V ...
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37 views

NMOS saturation mode: why is there no channel?

I have a question about the saturation mode. The cross-section of an NMOS transistor in saturation mode is usually drawn like this: But it seems to me that there can be no current from source to ...
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46 views

What is the formula for the maximum permissible symmetrical input signal swing?

I have a common-source amplifier, and I am looking for the maximum no- load symmetrical output signal swing, and maximum permissible symmetrical input signal swing. I would like to know the formula ...
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1answer
29 views

NMOS amplifier simple question?

While studying the NMOS amplifiers in my book I came across operations with differential output voltages and this circuit specifically.I want to understand what are the drain voltages and what is the ...
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1answer
98 views

How to find the Q point of the NMOS trsistor in Voltage-Divider Biasing Circuit?

The following is the circuit needed to be analyzed to find the Q point(\$V_{GS_Q}, V_{DS_Q}, I_{D_Q}\$). \$V_{TN}=1\text{V}\$ \$K_n=0.5\text{mAV}^{-2}\$ simulate this circuit – Schematic ...
2
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1answer
37 views

Help with NMOS Gate question

In this picture, when v1 and v2 are 0, M1,M2 are on and M3,M4 are off. V_T(threshold) = 1.7V, V_DD = 5V. Why is it that M1 and M2 are ON under these conditions? I thought when there is no power ...
2
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2answers
104 views

DC analysis of common source MOSFET circuits to find gate voltage using different power supplies

simulate this circuit – Schematic created using CircuitLab strong text I am solving problems on DC analysis of MOSFET circuits. We are supposed to find various parameters like Id(Drain ...
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1answer
48 views

NMOS Channel Type

I've seen some conflicting information about the inversion channel for an NMOS device. Is NMOS n-channel or p-channel? And is the substrate n or p? I know PMOS is just the opposite for both and the ...
2
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2answers
206 views

Create a CMOS circuit from a logic function [duplicate]

I have to create a CMOS circuit from the logic function: F= ~A + B (notA or B). I made the truth table but I'm stuck here trying to make the CMOS circuit. Any ideas anyone? Thanks! I know it's the ...
3
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1answer
130 views

CMOS technology, use a NMOS or PMOS as series switch?

A general question regarding switches in CMOS. Have a look at the schematic below (symplified current mirror) There is a input reference current, on/off switch, a PMOS mirror and the resulting ...
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0answers
78 views

How to find small-signal output resistance?

Here is the exercise, I would appreciate any hint thank you: !
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1answer
68 views

Stable solution

To my understanding a stable solution for a transistors is when the voltage will not fluctuate due to to a change in Vin or something like that. My question I guess would be, where would I start ...
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1answer
87 views

Why feedback is activating at more than 4V?

In this circuit: I don't get why the current start flowing from more than 4V. I thought was due to threshold, but the same happens with an NPN as M2 or using an BS170. With this last one, ...
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2answers
76 views

Trying to find steady state

I'm taking my first course in electronic circuits and I'm a little lost when it comes to combining NMOS transistors with capacitors. In particular I am having trouble with finding the steady state for ...
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1answer
101 views

Source potential for MOSFET with grounded substrate

Considering the configuration below, the source's potential should be invariant with respect to Vg (as long as Vg>Vt). So Vs is equal to Vdd. But if the substrate is connected to the source, as ...
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156 views

Odd MOSFET behaviour (in Multisim)

I have this circuit that's behaving in a strange manner. I am getting a surprisingly low current value flowing through the inductor when the path includes the N-channel MOSFET. Please could someone ...
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20 views

Effects of threshold voltage and body effect in PMOS and NMOS devices [duplicate]

Why is it that in PMOS devices limitations due to voltage drop and body effect are not present unlike in NMOS?
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3answers
1k views

How can PMOS eliminate body effect but NMOS doesn't?

I have a question on the body effect of MOS transistor. In particular, how does the body effect in PMOS be eliminated (by connecting bulk to source together) while this similar technique doesn't do ...
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1answer
217 views

NMOS transistor: how does its structure relate to two interconnecting diode?

There is a popular idea that structure of NMOS transistor could be viewed as the inter-connecting diode across their PN junction. Therefore, when operating NMOS, you always want to keep the Source and ...
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0answers
62 views

Preference of MOS resistor as load in MOS inverter [closed]

Whys is a MOS resistor preferred over diffused resistor as load in design of a MOS inverter?
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1answer
49 views

Find Id of NMOS

I need to find the drain current in the above circuit where I also know \$V_{TH} = 1\,\mathrm{V}\$ and \$\mu_{n}C_{ox} = 2\cdot 10^{-4} \frac{\mathrm{A}}{\mathrm{V}^2}\$. I'm just not sure about ...
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2answers
154 views

NMOS: what exactly forms the inversion layer

I have a a question on forming of the inversion layer in NMOS. More specifically, please refer to the following figures The negative ions (in-mobile) are due to the the accumulation of the positive ...
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3answers
162 views

NMOS: why VGS instead of VG?

I am having lots of trouble trying to understand how the mosfet is triggered. The text I read assumes the source of the NMOS connect to ground, while a positive voltage is applied at the gate. ...
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0answers
57 views

Derivation of depletion layer in depletion mode in MOS Structure

First off, please understand my background. I am doing a course in Digital Integrated Circuits and following the book CMOS Digital Integrated Circuits and Design by Kang (3rd Edition). I barely have ...
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1answer
311 views

Charge Pump for driving NMOS

I was looking for a way to drive the gate of a power NMOS. Since I've already have a small FPGA available at a independent backup-3V3 rail, I was thinking I could use it's internal oscillator to build ...
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0answers
196 views

Voltage transfer characteristics of a C-mos inverter

How to determine the voltage transfer characteristics of a c-mos inverter during the region when both the p-mos and the n-mos transistors are in the saturation region.I know that both the transistors ...
1
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1answer
93 views

Short NMOS differential pair amplifier question?

In my book it says that in the NMOS differential pair: $$V_{G1}=V_{G2}=V_{CM}$$ But does not explain why. Can you please explain to me why the voltage in each gate is equal to the common mode ...
0
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1answer
350 views

n-type mosfet calculate AD AS PD PS

I have a nMOS and I want to calculate AD AS PD PS . Given: L=0.25μm and W = 2μm. We know that \$AD = W*L_D\$ and \$PD = W + 2*L_D\$ ...
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1answer
950 views

Using p-channel mosfet on high side of h-bridge, do I really need a driver chip?

I know there are fancy h-bridge ic's to drive high side of h-bridge but I guess that is when I have to drive n channel mosfet. I am planning on using p channel mosfets on high side and n channel ...
0
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3answers
165 views

term “fat” when referring to NMOS and PMOS

I'm uncertain of the term "fat" when referring to NMOS and PMOS. Tried google and nothing. Could I get a little clarification?
2
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1answer
632 views

Why doesn't a capacitor connected to a MOSFET charge to VDD

If an nmos which has the gate and drain connected to VDD, and the source connected to a grounded capacitor, the nmos will start conducting and the capacitor will start charging as long as VDD > VTn ...
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2answers
996 views

NMOS CS Amplifier PSpice Simulation Question

I have a rather peculiar question. I am attempting to recreate the circuit below (from one of my labs) of a Common-Source Amplifier design with a bypassed Source Resistance in PSpice. It has the ...
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2answers
303 views

Pseudo-Nmos inverter in LTSPICE

In LTSPICE, I've built a pseudo-NMOS inverter and I've got 2 tasks to do using it. 1) I've a initial guess for Wn value of NMOS. I start the simulation with this value however, I need to optimize it ...
0
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2answers
419 views

Effect of Drain-source voltage on NMOS operation

I have been trying to understand the NMOS operation through various online tutorials but I am getting stuck in understanding the effect of increasing drain voltage on the flow of current and the ...
1
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1answer
98 views

Working principle of floating gate tunneling oxide

Floating gate tunneling oxide (FLOTOX) is used in electrically alterable rom. Tunneling of charge takes place through tunneling oxide into the floating gate. What is the working principle of this? How ...
4
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1answer
89 views

Presence of depletion layer in an N-MOSFET

The source and the substrate of an N-MOSFET are connected together and biased with zero potential. In spite of that, a thin depletion layer exists. Why?
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3answers
2k views

Low Drain-Source MOSFET Leakage

I've been looking at the SM74611 Smart Bypass Diode from Texas Instruments and am very impressed with the reported reverse leakage current (0.3uA at 25C). Considering the device has a N-Channel FET, ...
2
votes
1answer
890 views

nMOS passing 1's poorly and pMOS passing 0's poorly

I came across the statement in a digital design book that "nMOS transistors pass 0's well but pass 1's poorly" and "pMOS pass 1's well but 0's poorly". What exactly do these statements mean and why ...
3
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1answer
53 views

Mask Programmable Array Concept

I am having trouble understanding a lecture slide for Mask Programmable Arrays. The cell on the right is supposed to represent a 4-input NOR gate. But I just cant wrap my head around which pads ...