PCIe or PCI Express is a high-speed serial computer bus that offers higher speeds and a lower pin count than earlier standards such as PCI that it is designed to replace. Questions should relate to PCIe design issues not general consumer PC / peripheral issues.

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How to make an external PCI adapter that runs on USB3.0?

Motivated by old PCI (NOT PCIe) cards, and laptops without expansion slots, I want to try making a PCI-over-USB 3.0 solution. This is about 70% experimentation, and 30% actual use. Is this viable? I ...
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PCI Memory and I/O space

I'm currently reading Carl Hamacher's computer organization boook.At Chapter 3 he describes the generic i/o device interface like this : "An I/O device is connected to the interconnection network by ...
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40 views

Can I connect multiple computers with PCIe? [closed]

I've got an crazy idea about obtaining some Computer on Module boards having PCIe connection. Putting them in PCIe network, not ethernet network. Is it possible to connect multiple computers / CoMs ...
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114 views

Why doesn't PCIe and similar signaling systems use half-duplex links?

I'd like to get more PCIe bandwidth for GPU compute applications. It occurred to me that PCIe bidirectional links are really dual simplex (a pair of unidirectional links). That means if there's no ...
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Is USB-C a technically viable substitute for SATA Express connectors?

SATA Express, the successor to SATA, is too new to be widely used yet, but the advancing speed of SSDs appears to make it inevitable, the same as SATA replaced parallel IDE. Despite the name, it isn't ...
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76 views

Does the USB-C Alt Mode specification require support of the USB 3 protocol?

If a device is designed with a USB-C port that's intended for use exclusively in an alt mode such as Displayport or PCIe rather than for use as a general-purpose USB port, then the hardware to support ...
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27 views

Advice: how to integrate minipci cards to a board design

I'm designing a pcb card for one embedded device based on a Digi iMX28 module. In the design we included a couple of minipcie sockets to add 3G and wifi cards. However, there are two flavors of ...
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40 views

WiFi card without host device

So to start I wasn't quite sure about where this question should be asked, so feel fre to relocate it if you want. I'm setting up a system to notify me when a user enters an area. My plan is to use ...
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120 views

What Gerber file extension is used to specify PCIe edge connector plating?

I am designing a PCB in Eagle using the mini PCIe card format and am not sure how to specify finger plating the board edge connector to the PCB fabricator. These plating regions are specified in Eagle ...
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55 views

UART, USB… on cellular cards

Sierra Wireless and other manufacturer carry cellular cards in a variety of physical interfaces. There are different digital interfaces to hardware like USB, UART, USB OTG, HSIC... Additionally ...
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153 views

How to power an x16 PCIe card in an x8 slot?

In the cryptocurrency community, when GPU-mining was profitable, it was common for people to use ribbon cables to connect the graphics cards to PCIe slots. This lets one use more GPUs than there are ...
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31 views

PCI express. Connect of GP1-GP4 pins

We develop a PXI express peripheral card. The interface is by PLX8311 works as "endpoint mode". The interface beginning to work fine but we don't understand how to connect these pins(GP1-GP4). Right ...
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81 views

Switch PCIe connections

I'm trying to implement a PCI express switch; one lane from SoC and, two for mini PCIe ports. Something like the picture below. But I'm confused with the Tx and Rx connections, the transmitter ...
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168 views

How to simulate PCIe to debug my FPGA endpoint

I'm working on an FPGA controller connected through PCIe. The only way I can debug the hardware is using chipscope. So I execute commands through my driver and check out the signals from the FPGA. ...
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218 views

Ways to connect a PCIe/PCIe2 card and other PC parts to a breadboard?

Basically I have a bunch of rather old computer parts that I haven't been able to get rid of so I decided to do a few experiments with them but for that I need to be able to breadboard them. Things ...
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1answer
135 views

PCIe add-in card thickness tolerance

I can't find a tolerance measurement for the 62 mils thickness specified in the PCIe electromechanical spec. How much leeway do I have for board thickness in an add-in card. Additional details: I'm ...
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156 views

Why are there so many signal grounds for PCI Express?

PCIe connections have one to two ground contacts per differential signal pair. Why is this the case? On the boards that I have been studying, all of these pins are tied together onto the same ground ...
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101 views

Mini PCIe switch with 1 lane 2 devices?

I have a doubt, I have a SoC with 1 lane of PCIeV2 and I want to connect 2 wifi modules through PCIe to the SoC, so I want to use a PCIe switch to do it (the 802.11n is 600 Mbit/s and the PCIeV2 is ...
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180 views

PCI-Express Processor/Co-processor cards [closed]

I am hoping someone might be able to help: In the days when I started with computing (C64 and later Amigas) expansion slot cards with co-processing ability were relatively common. I am looking for ...
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4answers
341 views

GPIO/PCIe programing

I want to connect a PCIe 16x 3.0 GPU card to a Raspberry pi. I don't mind lo loose bandwidth, i just want to use the core GPU capabilities. So, the only idea that came out to my mind is to use the 26 ...
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206 views

gold finger plating needed on prototype board edge connector?

I am making a PCIe card and will be ordering prototypes. I know that in my production cards I should order hard gold plating on the edge connector. Can I skip this plating on my prototype cards to ...
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472 views

pci express bifurcation - clock fanout buffer needed to split reference clock?

I am designing for a motherboard with a single PCIe x16 slot which can be bifurcated into 2 logical x8 slots with jumper settings. I am designing a board to handle the physical splitting of the port. ...
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477 views

Is it possible to only utilise SMBus on PCI Express 1X?

According to the Wikipedia page on PCI Express, the PCI-e 1X slots have 18 pin positions on two lanes (so 36 pins) and positions 5-9 represent SMBus and JTAG. I'd like to hook up a µC as an ...
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167 views

PCIE reference clock

I recently completed a PCI-E Gen 1.0 line card design. The line card consisted of 4 Spartan 6 FPGAs sharing one PCIE reference clock. Early on in the design there was a decision to solely use the PCIE ...
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124 views

PCIe branching - Requirement of Switch

Considering the following scenario: A designer wants to connect 3 devices on a PCIe x4 finger edge connector, commonly found on mother boards. All 3 devices will be populated on the same PCIe card. ...
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PCIe card powered but not recognized on custom interface

I have a black magic declink mini recorder card that I am trying to recognize on a small form factor linux machine (debian 3.2.46-1 x86_64). I have made a custom interface board with what I think are ...
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196 views

Motherboard with separate circuitry for PCIe, CPU, RAM etc [closed]

I asked this question on another forum (http://www.tomshardware.com/answers/id-1812014/motherboard-separate-circuitry-pcie-cpu-ram.html) but nobody replied yet so posting it here I am looking for an ...
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Can't read user-defined configuration space pci-express IP Virtex 6 Xilinx in testbench

I use IP core PCI-E for Virtex-6 v.2.5 There is configuration space in PCI-E It divides on standart space of PCI-E and vendor-specified or user-defined configuration space. There are two types of ...
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179 views

PCIe: Who's in charge here?

I want to construct a matrix of smart boards that receive ethernet packets, decode them, and place the decoded results onto a memory "matrix" for other boards to process and re-transmit. Given the ...
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2k views

What does “configuration” refer to in PCI and PCIe? How is this different from “Enumeration”

I am not being able to find a clear description of what configuration means in PCI and PCIe. I have found something called as configuration space, but without knowing what configuration means, it is ...
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2k views

What do the different interrupts in PCIe do? I referring to MSI, MSI-X and INTx

We have the following interrupts: MSI, MSI-X and INTx. What do these different type of interrupts do in PCIe? I only need a short description. I only know that in PCIe interrupts are generated as ...
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359 views

What is the utility of the reference clock in PCI express?

I understand that PCI express is a serial connection with clock embedded with the signals. So, what is the utility of the reference clock signal? What is it used for? Does the reference clock have to ...
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209 views

PC shares memory with external microcontroller

I'm looking for a PC hardware interface that matches these needs- The PC will constantly be busy performing calculations. Each time there is a calculation result (every ~1ms) I want it to share it ...
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133 views

Can a designer get hold of the PCI Express specification without being a member of the PCI SIG group? [closed]

I want to get hold of the PCI Express specification which is available here . But when I try to download it, it asks me to login as a member - which requires membership at $3000 per year. Is it ...
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696 views

PCIe fails on “polling compliance” state

I am using the PCIe block of Altera Cyclone IV FPGA, and I have an issue whereby about half the PCIe slots I have tried (on three different computers) do not work. Debugging with SignalTap shows that ...
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598 views

6-Layer Stackup for PCI express design

I'm pondering over a stackup for a 6-layer board using a couple of PCIe connected ICs. My first idea was to use the following Stackup: Signal GND Power (Multiple power supplies, so it's a split ...
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419 views

Can I remove unneeded 2 plugs from PCI-E power cable?

I have a PCI-E PSU power cable and I have two unneeded pins at the end (only need 6 power pins but have 6+2). Can I simply remove the pin where these two wires enter the PSU? I wouldn't think that ...
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385 views

PCIe Reference Clock logic level

I have a PCIe reference clock generator chip, ASVMPHC-100.000MHZ-LR (datasheet), but it generates a sinusoidal waveform at 100 MHz with an amplitude of ~750 mV. Should I be running this through a NOT ...
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506 views

PCIe Prototyping Backplane

I am trying to interface a TI c6678 8 core DSP evaluation board to a USB camera. The TI chip / board does not have USB, it has 1 SPI, 1 UART, 1 PCIe (2 lanes), and SRIO. The eval board only has an ...
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How do PCI Express Graphics Cards pull power from both the slot and the external 6-pin connector?

A x16 PCI Express slot can deliver 75W for PCI Express Graphics Card. Some graphics card today also use external PCI Express power to increase above this limit, the most basic of these is the 6-pin ...
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How can I power my 6-pin PCI Express card without using an ATX power supply?

One of my older computers has a 365-watt power supply that, for various reasons, cannot be replaced with a new power supply. I would like to upgrade the graphics card in that computer, but all the ...
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196 views

FPGA project sanity check, PCIE and video processeing

I have an Altera DE4 education FPGA that I'd like to use for video processing... But the thing doesn't have many ports to work with, and I don't have the funds to purchase any daughter boards. My ...
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183 views

Can Thunderbolt be used to power the host device?

Could the Thunderbolt interface be used to provide power to the PCIe host device? In this case, this would be a battery-powered mobile device, connecting to a range of peripherals. Thunderbolt here ...
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400 views

PCI-Express on SATA or SATA on PCI-Express damaging?

OK, at first this sounds like an obvious and serious design error. But I'm trying to figure out muxing the SERDES signals on a PCI-Express Mini card, such as WiFi cards in laptops and mSATA cards in ...
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6k views

WiFi module says “mini PCI-e format” with “USB host interface” - what does this mean?

The specifications of a WiFi module meant for embedded projects, says -- mini PCIe format Host interface supports USB.2.0 Works with any board with mini PCIe. Not sure about the interplay of mini ...
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727 views

Difference between busses

I think I am confusing the difference between some of the of busses, such as IDE, SATA, USB, and PCI. What is the relationship between all four, how are they connected to each other? From what I read ...
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AC coupling on PCIe layout

I'm working on a layout in which two chips connect to each other through a 1x PCIe bus. The two chips are on one board. One of the chips is the Xilinx Spartan6 LX75T so I've been working with the ...
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465 views

Low cost PCI Express development board

I'm looking for a low cost (less than $100) board with a PCI Express (x1) interface and with some kind of a programmable CPU that can use that interface. I don't need anything fancy, just something ...
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489 views

How can I get touchscreen (HID) data into Windows 7?

We have a hardware design in progress that is taking touch screen inputs and passing them along via I2C to an FPGA. The FPGA translates the I2C data to PCIe. The PCIe passes the touchscreen data to ...
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Guidelines on branching of a PCI express signal

We have 3 PCIe slots on a board, let's call them A, B and C. On this board, slot A will always be populated with a PCIe device, however, among slots B and C, only one of them will be populated. There ...