RAM is an abbreviation for Random Access Memory. A type of memory in which the information can be accessed from random location.

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How can I replace this 5565 SRAM with a dual port SRAM?

I have an existing device (an arcade CPU board) that stores some data in a 5565 64-Kbit SRAM. I want to replace it with a dual-port RAM so I can read the data with a microcontroller. I don't need to ...
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374 views

Fesibility of using “computer RAM” with a microcontroller project

How feasible is it that I could connect the pins of some garden variety "computer RAM" to a microcontroller for use as external RAM? Is there specific hardware used on computer motherboards that help ...
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46 views

What happens when VRAM fails?

When VRAM fails within a video device, there appear to be certain common patterns of visual artifacts. This got me thinking - when VRAM (and RAM in general) fails, what is it that's actually happening ...
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89 views

How to set up the read part in Ram from Logisim?

I really need help for the read part in this project! Basically, we should build up a 4 nibbles Ram with 4 bits data register, 2 bits address register and 1 bit mode register. The problem is my ...
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126 views

problem with making 1 bit RAM memory using transistors?

I'm trying to make 1 bit RAM using four transistor ( 2 NOR Gates ). I built the 2 copies of the following circuit: I connected a LED to the output "F". Also, I connected Another LED to the output ...
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41 views

Verilog megawizard RAM not read

I used Quartus II Magawizard to ask for a two port RAM(one read and one write). The addresses are correct but the data out is always z. Can some one help me with this problem? I have stuck here for a ...
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43 views

What is DRAM atom size? Does it have any relation to the channel size?

I have seen that the channel size is in bits (64b/128b) which I understand is the amount of data one channel can transfer at an edge. But I see that the atom size is in Bytes. So does an atom of ...
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79 views

How a decoded picture is stored in a memory? [closed]

If we decode an image (any format) we will get matrix of pixels. For example consider a picture with resolution 10x10 and colour depth of 16777216. Therefore pixel is represented by 24 (888 RGB) bit ...
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63 views

Issue replacing 27C256 ROM with 62256 RAM

I'm trying to replace a 27c256 ROM with a 62256 RAM, to be able to easily change the memory content. I thought this would be pretty straight forward. Not quite, it seems. I made an simple ...
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413 views

What happens when microcontrollers run out of RAM?

It may just be a coincidence but I've noticed the microcontrollers I've used rebooted when they ran out of RAM (Atmega 328 if hardware specific). Is that what microcontrollers do when they run out of ...
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120 views

VHDL How to Design a Screen (Frame) Buffer

I am trying to use a screen buffer to store, change and output the bits of a video data to the DVI transmit interface. I am using Altera Cyclone III development kit. I will be using 1440x900@60Hz ...
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75 views

Where to put Bootloader Key in Ram, what address is the last ram address?

I am programming a CDC Bootloader. What I want to do is to run the program, from there write a bootloader key to the ram at a specific address and watchdog reset the MCU. The Bootloader reads exactly ...
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88 views

Random Access Memory Modelling in Verilog

Is there a better/alternative way of modelling RAM Memory in Verilog other than declaring it as an array of registers? Most of the sources I referred to have memories coded in the following manner. ...
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93 views

RAM memory modelling in Verilog

I am trying to model a 0.125GB RAM memory in Verilog using ModelSim of width 512 bit using memory chips of width 32 bit. So I have created a 32 * \$\2^{18}\$ memory array whose code is as follows: ...
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46 views

Creating Serial Pressence Detect data from discrete DDR RAM datasheet

I have a board that has soldered discrete DDR RAM chips. The datasheet for the DDR RAM chips is available to me. The DDR memory controller is programmed manually using pre-calculated values. I have ...
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253 views

Building larger ram from smaller ram

Using two 74F189 parts, implement 16x8 bit RAM circuit. Using two 74F189 parts and decoder, implement 32x4 bit RAM circuit. Using four 74F189 parts and decoder, implement 32x8 bit RAM circuit. Not ...
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68 views

IC for 4 Kbytes of RAM [closed]

Is there a Memory IC for 4Kbytes of RAM? I'm trying to make a schematic capture in Proteus and I need a Memory IC for 4Kbytes of RAM, I've searched throughout the library and I can't find one, tried ...
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67 views

Role of the MMU in a Page Fault Swap

When a virtual memory address outside the range of loaded into physical RAM is referenced and a page fault occurs, does the Memory Management Unit rely on DMA (Direct Memory Access) to swap the ...
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1answer
117 views

How do you store A or B in a RAM of a CPU datapath?

I have an assignment to make a CPU, but am confused with how f_left and f_right are going to be used. I think they are to store ...
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354 views

MSP430 RAM protection

I'm looking at the user guide for the MSP430x5xx family. It says there in section 9.1 that: ...
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111 views

How big is a single RAM cell?

I am studying on my own how the PC works and I can't understand one thing. A 32 or 64 bit processor differs for its ability to allocate 2 ^ 32 or 2 ^ 64 addresses for the cells of the RAM. What I do ...
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38 views

MAR /MBR / MUX Device

How can I modify this circuit to permit loading of the MBR from either the hex keyboard or from memory. As it is, the circuit can only load the MBR from user input.
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1answer
64 views

RAM and data copying/moving

I was wondering about the copying/moving of data in RAM and I couldn't help but thing about the possibility of having the RAM process basic memory operations such as copying/moving of memory, if ...
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128 views

Buffer management for SD card in SPI mode

I'm looking into implementing storage of large audio files onto an SD card. I'll be using SPI to access the card to avoid any patents by the SD card mafia. I'll be generating a lot of data, about ...
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197 views

FPGA RAM / SRAM in VHDL

Today I ran out of gates on my Xylinx Spartan 3 (Basys2 by Digilent) FPGA. This was not a surprise to me as I had implemented an 8 bit x 2048 array for use as an FIFO buffer. Code: ...
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114 views

If I pull the power on my computer and IMMEDIATELY restart it without booting OS, will RAM contents be preserved?

I have DDR3 RAM in my computer. My computer is frozen and I have important unsaved work open. I've already dealt with the problem of how to recover and read the contents of RAM. I just need to be able ...
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83 views

Can a computer and its RAM function properly if the temperature of the RAM has been significantly reduced?

This may be in the wrong section so if it is I apologize. I'm trying to significantly reduce the temperature of my computer's RAM so I can preserve it's contents during a PC reboot. I read about the ...
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44 views

Battery backed RAM for access by the OS

I apologize if this is the wrong place to ask this (just let me know where to go, if that's the case). I want to know if anyone has an idea how to set up battery backed RAM, like in an old S/NES ...
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1answer
41 views

Optimum aspect ratio for storing data in Block RAMs

I am working on Xilinx virtex 4 FPGA. I want to store some filter coefficients in Block RAMs. Specifically, I have many sets of filter, each set having 64 coefficient, each coefficient is of 18 bits. ...
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88 views

RAM/Latch Type IC

I was looking to find an IC (particularly in the 7400 series) that could act as a very simple RAM device, like a flip-flop or something. I came across 74hc373, but I'm not sure this is what I'm ...
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194 views

Look up tables, Flash or SRAM?

A STM32F4 platform is used, which has 192kBytes SRAM, which is sufficient for me. I am trying to build a look up table. The LUT will be used in calculation several times. And I want to put it in SRAM ...
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55 views

Setting up data prior to a rising edge - what's best practice?

I'm a newbie, playing around with a very simple single port block RAM (on an FPGA actually). Its 'read'-timing is standard stuff - i) An address on the RAM input gets latched on a first rising clock ...
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655 views

How does DDR SDRAM work?

The figure is about how DDR SDRAM and DDR SDRAM2 works. After taking some time searching, I still cannot understand the figure. Can anyone please help me understand it? In this case, is the ...
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50 views

Quartus II Memory Read Clock Problem

I used LPM_RAM to store data and made read and write operations. But it seems like placing the data to wrong addresses. Here is screenshots; Wave Result; Memory Block;
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What do hardware address pins do?

I have been delving deep into digital logic and am trying to understand some memory architecture basics. I have started looking at data sheets to get a grasp on some real-world components and noticed ...
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343 views

The difference between storage patterns in RAM or SD cards from EEPROM [closed]

I have used EEPROM to store data in embedded systems. I would like to know about the pattern of RAM and SD cards which were used to store data. Is it that complex in terms of using RAM or SD cards? I ...
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1answer
128 views

Programming an EPROM using 8085 kit

I need to program an EPROM/EEPROM with the code for an 8085. I do not have a programmer. I can't buy one. But I have access to an 8085 kit. Can I use it to program the EPROM/EEPROM via an interface? ...
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119 views

Using smaller ram to make a larger ram unit? [closed]

So far, I figure I need to divide the 2k x 22 RAM's into a 4 parallel connection to get the 3 bits data out, and I assume I'm going to need 3G/2K= 125000 rows of RAM, but I'm not sure out to set up ...
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Flash and RAM : Code Execution

I recently started learning assembly and came to know about linker scripts and other low-level details of hardware programming. I am also teaching myself computer architecture and somewhere along the ...
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293 views

Why is MSP430's Stack Poniter(SP) always alligned to even address?

While I was reading through the MSP430's User's guide, I came to know that its stack pointer is alligned to even address. (Read Pg.189 of http://www.ti.com/lit/ug/slau208m/slau208m.pdf) Why is it so ...
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388 views

Microcontroller requirements for TFT display

I want to know if I can drive this 320x240 TFT display: http://www.buydisplay.com/download/manual/ER-TFT032-2_Datasheet.pdf Which has this controller built-in with 168KB dedicated RAM: ...
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133 views

Combining CPU and RAM on stacked silicon

Xilinx developed a way to combine multiple dies in a single package by using a silicon interposer (I don't know whether they're actually are the first ones to do this). This way, they achieve huge ...
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185 views

Reading RAM externally in a running system by intercepting the memory bus or replacing the RAM chips?

I wonder if it is possible to modify a consumer electronic system (TV, phone, embedded device, etc.) so that it is possible to read and possibly write the contents of its RAM chips while system is ...
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361 views

FPGA link to external memory

I am trying to use the cellular ram on the Nexys 4 FPGA development board. I am using Xilinx Vivado and would like a Microblaze soft core processor to be able to perform reads and writes. So far I ...
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303 views

Allocating more memory Space in controller

Chip: PIC18f26j50 Compiler: C18 My objective is to store values in a table in the RAM memory using structures and feed in the values which are quite large. ...
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209 views

Creating a 16*8bit RAM with D flip flops

I need to create a RAM in Proteus Suite. The RAM should have 16 storage spaces each containing 8bits of data (16*8bit RAM) and the output should be a three-state output. I've tried to create one, but ...
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183 views

Reducing chip count for an ARM embedded system

It seems like a lot of devices use an ARM SoC + a RAM chip + a flash storage chip. In applications that are very space-constrained, such as ChromeCast dongles, micro drones, or wristbands, it would be ...
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Using open collector as regular 5v output

I'm trying to use the following IC: SN74S289BJ so that the output is 5v when HIGH and ~0v when LOW, however I'm having problems due to the open collector nature of it, as I've written data to a ...
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470 views

Simulation of large RAM

I want to test a video IP core that reads a block of memory and writes to it again. The IP core is using the VFBC. My idea for testing was to write a core that looks like the VFBC, but just uses a ...
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Inferring BRAM with unused addresses efficiently

What is a correct way to infer a RAM with some unused higher addresses (using block RAMs)? Using the code below (default values for generics, Xilinx synth and map) I get a RAM sized the same as if ...