RAM is an abbreviation for Random Access Memory. A type of memory in which the information can be accessed from random location.

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Delaying RAM - Memory! [on hold]

I want to delay a signal 20 us by using a RAM memory. The clock frequency is 50 Mhz. So my question are: a) Which is the minimun size for the memory that we need? The memory must be a power of 2. ...
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14 views

MAR /MBR / MUX Device

How can I modify this circuit to permit loading of the MBR from either the hex keyboard or from memory. As it is, the circuit can only load the MBR from user input.
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1answer
53 views

RAM and data copying/moving

I was wondering about the copying/moving of data in RAM and I couldn't help but thing about the possibility of having the RAM process basic memory operations such as copying/moving of memory, if ...
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2answers
86 views

Buffer management for SD card in SPI mode

I'm looking into implementing storage of large audio files onto an SD card. I'll be using SPI to access the card to avoid any patents by the SD card mafia. I'll be generating a lot of data, about ...
3
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2answers
89 views

FPGA RAM / SRAM in VHDL

Today I ran out of gates on my Xylinx Spartan 3 (Basys2 by Digilent) FPGA. This was not a surprise to me as I had implemented an 8 bit x 2048 array for use as an FIFO buffer. Code: ...
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3answers
107 views

If I pull the power on my computer and IMMEDIATELY restart it without booting OS, will RAM contents be preserved?

I have DDR3 RAM in my computer. My computer is frozen and I have important unsaved work open. I've already dealt with the problem of how to recover and read the contents of RAM. I just need to be able ...
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2answers
69 views

Can a computer and its RAM function properly if the temperature of the RAM has been significantly reduced?

This may be in the wrong section so if it is I apologize. I'm trying to significantly reduce the temperature of my computer's RAM so I can preserve it's contents during a PC reboot. I read about the ...
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41 views

Battery backed RAM for access by the OS

I apologize if this is the wrong place to ask this (just let me know where to go, if that's the case). I want to know if anyone has an idea how to set up battery backed RAM, like in an old S/NES ...
2
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1answer
36 views

Optimum aspect ratio for storing data in Block RAMs

I am working on Xilinx virtex 4 FPGA. I want to store some filter coefficients in Block RAMs. Specifically, I have many sets of filter, each set having 64 coefficient, each coefficient is of 18 bits. ...
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2answers
75 views

RAM/Latch Type IC

I was looking to find an IC (particularly in the 7400 series) that could act as a very simple RAM device, like a flip-flop or something. I came across 74hc373, but I'm not sure this is what I'm ...
4
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1answer
125 views

Look up tables, Flash or SRAM?

A STM32F4 platform is used, which has 192kBytes SRAM, which is sufficient for me. I am trying to build a look up table. The LUT will be used in calculation several times. And I want to put it in SRAM ...
2
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1answer
46 views

Setting up data prior to a rising edge - what's best practice?

I'm a newbie, playing around with a very simple single port block RAM (on an FPGA actually). Its 'read'-timing is standard stuff - i) An address on the RAM input gets latched on a first rising clock ...
2
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2answers
180 views

How does DDR SDRAM work?

The figure is about how DDR SDRAM and DDR SDRAM2 works. After taking some time searching, I still cannot understand the figure. Can anyone please help me understand it? In this case, is the ...
0
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1answer
38 views

Quartus II Memory Read Clock Problem

I used LPM_RAM to store data and made read and write operations. But it seems like placing the data to wrong addresses. Here is screenshots; Wave Result; Memory Block;
3
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2answers
491 views

What do hardware address pins do?

I have been delving deep into digital logic and am trying to understand some memory architecture basics. I have started looking at data sheets to get a grasp on some real-world components and noticed ...
0
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1answer
154 views

The difference between storage patterns in RAM or SD cards from EEPROM [closed]

I have used EEPROM to store data in embedded systems. I would like to know about the pattern of RAM and SD cards which were used to store data. Is it that complex in terms of using RAM or SD cards? I ...
0
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1answer
92 views

Programming an EPROM using 8085 kit

I need to program an EPROM/EEPROM with the code for an 8085. I do not have a programmer. I can't buy one. But I have access to an 8085 kit. Can I use it to program the EPROM/EEPROM via an interface? ...
0
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1answer
89 views

Using smaller ram to make a larger ram unit? [closed]

So far, I figure I need to divide the 2k x 22 RAM's into a 4 parallel connection to get the 3 bits data out, and I assume I'm going to need 3G/2K= 125000 rows of RAM, but I'm not sure out to set up ...
5
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3answers
725 views

Flash and RAM : Code Execution

I recently started learning assembly and came to know about linker scripts and other low-level details of hardware programming. I am also teaching myself computer architecture and somewhere along the ...
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3answers
165 views

Why is MSP430's Stack Poniter(SP) always alligned to even address?

While I was reading through the MSP430's User's guide, I came to know that its stack pointer is alligned to even address. (Read Pg.189 of http://www.ti.com/lit/ug/slau208m/slau208m.pdf) Why is it so ...
3
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2answers
209 views

Microcontroller requirements for TFT display

I want to know if I can drive this 320x240 TFT display: http://www.buydisplay.com/download/manual/ER-TFT032-2_Datasheet.pdf Which has this controller built-in with 168KB dedicated RAM: ...
1
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1answer
79 views

Combining CPU and RAM on stacked silicon

Xilinx developed a way to combine multiple dies in a single package by using a silicon interposer (I don't know whether they're actually are the first ones to do this). This way, they achieve huge ...
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1answer
129 views

Reading RAM externally in a running system by intercepting the memory bus or replacing the RAM chips?

I wonder if it is possible to modify a consumer electronic system (TV, phone, embedded device, etc.) so that it is possible to read and possibly write the contents of its RAM chips while system is ...
3
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0answers
236 views

FPGA link to external memory

I am trying to use the cellular ram on the Nexys 4 FPGA development board. I am using Xilinx Vivado and would like a Microblaze soft core processor to be able to perform reads and writes. So far I ...
2
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2answers
180 views

Allocating more memory Space in controller

Chip: PIC18f26j50 Compiler: C18 My objective is to store values in a table in the RAM memory using structures and feed in the values which are quite large. ...
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139 views

Creating a 16*8bit RAM with D flip flops

I need to create a RAM in Proteus Suite. The RAM should have 16 storage spaces each containing 8bits of data (16*8bit RAM) and the output should be a three-state output. I've tried to create one, but ...
2
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1answer
128 views

Reducing chip count for an ARM embedded system

It seems like a lot of devices use an ARM SoC + a RAM chip + a flash storage chip. In applications that are very space-constrained, such as ChromeCast dongles, micro drones, or wristbands, it would be ...
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2answers
159 views

Using open collector as regular 5v output

I'm trying to use the following IC: SN74S289BJ so that the output is 5v when HIGH and ~0v when LOW, however I'm having problems due to the open collector nature of it, as I've written data to a ...
2
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2answers
288 views

Simulation of large RAM

I want to test a video IP core that reads a block of memory and writes to it again. The IP core is using the VFBC. My idea for testing was to write a core that looks like the VFBC, but just uses a ...
3
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3answers
147 views

Inferring BRAM with unused addresses efficiently

What is a correct way to infer a RAM with some unused higher addresses (using block RAMs)? Using the code below (default values for generics, Xilinx synth and map) I get a RAM sized the same as if ...
0
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1answer
75 views

How do microsequencers in CPUs parse data from RAM in the control unit/control store before determining what to do with the bits/voltages?

I have been reading up on machine code, and in many architectures (x86 IA-32, IA-64, AMD K6, ARM v7, ARM v9) and microarchitectures (Intel Core, P6, P5, etc.) machine code is additionally translated ...
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2answers
148 views

using ram verilog instantiation

I have implemented ram Verilog module. I made its instantiation and read the data from some address .After that I want to write the data to other address. looks that I don`t need to made the ...
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1answer
162 views

Motherboard with separate circuitry for PCIe, CPU, RAM etc [closed]

I asked this question on another forum (http://www.tomshardware.com/answers/id-1812014/motherboard-separate-circuitry-pcie-cpu-ram.html) but nobody replied yet so posting it here I am looking for an ...
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2answers
129 views

Debugging DDR bus issues

We have an SBC board, in the style of the Leopardboard or Beagleboard, that is misbehaving. It's based on the Leopardboard design (TI-DM368 CPU, DDR2 RAM, NAND Flash). Developing software on the ...
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1answer
130 views

How does a 8 bit register bank hold 8 regsiters of 8 bits each?

In 8051, there are 128 bytes of RAM. Of which, 32 are set aside for registers in the form of banks, 8 registers to each bank. ...
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4answers
579 views

PIC microcontroller memory limitations

I am trying to program a PIC10f202 using the XC8 compiler to compare the value of a timer to a variable which will be a function of a look-up table. Here is a sample code : ...
0
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2answers
83 views

What is the main Computer Memory Addressing Mechanism for Semi-Conductor Memory? [duplicate]

Most semiconductor memory is organized into memory cells or bistable flip-flops, each storing one bit (0 or 1). How exactly are the needed '1's or '0's taken from Memory? What mechanism or algorithm? ...
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3answers
87 views

How is 'specific' data found and taken from a Semiconductor Memory Source?

In a semiconductor memory chip, each bit of binary data is stored in a tiny circuit called a memory cell consisting of one to several transistors. Volatile type. Suppose an application stored its ...
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1answer
220 views

Accessing RAM instance from multiple modules in Verilog

I am trying to make a single instance of RAM module accessible in different modules without instantiating it in every module. Since If I instantiate RAM module in each module, there are two more ...
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1answer
341 views

SAP-1/8 Bit Computer MAR/RAM [closed]

I am looking to develop my own 8 bit computer with a really basic instruction set. I do not know however what the best IC is to be able to perform this job. Could I utilise an Arduino to act as the ...
2
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1answer
639 views

How does the D Flip Flop work and WHY does it hold its value?

I'm trying to grasp and understanding of electronics hopefully to work my way up to building an 8 bit computer. I'm currently digging deeper into Flip Flops, and rather than taking them that they ...
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4answers
663 views

Inferring Dual-Port Block RAM

I am using a Basys 2 with 72Kbits of dual-port block RAM. I utilized over 100% of slices available and so I want to make sure Xilinx isn't just filling them up with the character map values instead of ...
2
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2answers
1k views

the . hex file we burn goes to flash memory or RAM or EEPROM of Atmega8?

The flash memory of atmega8 is 8Kb. Is this the maximum size for the .hex file, or it the max memory which i can allocate to variables in my code? If none of the above is true, than what is memory ...
2
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2answers
1k views

Differences, uses, and theory of volatile and nonvolatile memory?

I understand the basics of volatile and nonvolatile memory. Volatile memory requires a constant power supply to retain data whereas non-volatile memory does not require a constant power supply to ...
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0answers
73 views

How to determine RAM size via datasheet

The name says all: How can I determine the RAM size via the data sheet? Do you multiply the numbers given like: MT48LC32M8A2 – 8 Meg x 8 x 4 banks There is the sheet I am referring to. ...
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40 views

Will this RAM bypass interfere with linux's total memory count? [duplicate]

As the patent in this question shows, it may be possible to hijack a computer by bypassing the memory controller. If it's true that it only hijacks part of the RAM at a time, does that mean that it ...
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1answer
82 views

can an “owner” lock RAM?

I've been reading http://www.ccs.neu.edu/course/com3200/parent/NOTES/DDR.html and it seems to suggest that a closed page cannot be accessed by anything other than the owner, paraphrasing. Is this ...
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3answers
144 views

Video Controller Design

I'm designing my own computer based on the Zilog Z80. It has 256KiB of static RAM with paging as well as a few megabytes of flash memory. Everything is going along pretty well until * BAM * I hit a ...
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2answers
122 views

What is the reason of RAM modules conflicts in terms of computer architecture?

What is the reason of such conflicts? I read a book "Computer architecture" by Andrew Tanenbaum, but didn't understand the reasons may cause conflicts with memory with different timings, frequencies.
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3answers
150 views

Using a CPU manually [closed]

Ok, I know this may sound dumb but, here is the thing: I recently removed a cpu, ram and hard disk from my 10-ish year old pc. At first, I did that to understand how the pc was built. Now, the next ...