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2
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1answer
38 views

Eliminating Signal Race Hazard in an IC dynamic latch/register!

I work in MAGIC Integrated Circuit software at layout-level. I got an 8bit dynamic register made of 1bit dynamic flipflops that write input on the positive edge of the signal: (Note: I used ...
0
votes
1answer
49 views

how the CPU start by execution stored in motherboards flash memory chip [closed]

I had read that at start, the CPU program counter register is fill with F000. I though that: PC registers contain the next instruction address. This address is send to the address bus and value ...
1
vote
1answer
68 views

Integrated Circuit Layout Design - Dynamic Flip Flop?

I need to create a dynamic flip flop like this: In integrated circuit technology, at mask layout level. I then want to create an 8bit register, using 8 of these flip flops, with a common CLK ...
4
votes
1answer
43 views

What does banking mean when applied to registers?

This answer to a question on StackOverflow about what banking means in the context of ARM's banked registers indicates that there is some confusion about the meaning of banking when applied to ...
1
vote
2answers
116 views

How to design a left shift register

I want a circuit in which I get the following sequence: 0001, 0010, 0100, 1000, 0001 I know that it's 4-bit shift register. But what is my approach to design ...
0
votes
1answer
37 views

How data movement from large register to small register works in VHDL?

I went through a VHDL sample code for memory management. In that data from a 32 bit register was directly moved into a 8 bit register. My doubt it is how this data movement can happen? Is there is any ...
2
votes
2answers
160 views

How many servos can I run on an ATtiny85?

This is my first time asking a question on this website, so please correct me if I'm doing something wrong... I have been working on a small project which runs three Servo motors on an ATtiny85, ...
1
vote
2answers
104 views

VHDL: How to double read a register bank?

We have been tasked with creating a register bank that can dual read, but only single write. At the moment I've got it all working apart from the dual read. Could someone point me in the right ...
0
votes
1answer
45 views

STM32F0 GPIOx_ODR vs GPIOx_BSRR

Apart from the register structure what is the difference between GPIOx_ODR and GPIOx_BSRR? Is GPIOx_BSRR an abstraction layer for GPIOx_ODR? I know that a change in GPIOx_BSRR "will" change the ...
0
votes
1answer
54 views

How to clear a 4 bit shift register with no clear input?

I have 4 bit pipo shift register 74ls95 . It does not have an clear input. Is there any way to clear the register without giving all the parallel inputs as zero. I am using it as an component of shift ...
0
votes
1answer
78 views

A program to add 6 bytes of data and store sum and carry in 8085 instruction set

I have a question on 8085 instruction set. A program to add 6 bytes of data stored in memory starting from 4500h. must use b register to save any carries and finally store the sum and carry at two ...
4
votes
3answers
133 views

Clocked edge-triggered timing (contamination delay)

I'm reading a book about computer architecture, and it says that, in clocked edge-triggered devices, the contamination delay is usually nonzero, and that the contamination delay for registers is ...
0
votes
2answers
478 views

What is the difference between TCCR1A and TCCR1B [closed]

I had an error in the configuration of PWM for the atmega8 because I didn't set my register properly. But I thought that Timer 1 is timer 1, no matter is TCCR1A or TCCR1B. Why can I set all the timer ...
1
vote
1answer
73 views

What is the purpose of CRC_IDR in STM32 processors?

The STM32's CRC calculation unit has a register named CRC_IDR. This 32 bit register allows the user to store 8bits of data. There seems to be no link between this register and rest of the CRC ...
0
votes
2answers
121 views

How to avoid input/output conflicts with a bus

How does a system bus work? I don't understand how can a circuit avoid input/output issues with a bus. I included an image to better explain my thinking. The circuit has 2 general purpose ...
0
votes
3answers
96 views

Veriog:How to pass a register to a module?

Assume we have a module with 32 bits output like this: module ModuleLow(foo,...); output [31:0] foo; Now we want to use it in another module ( a very simple ...
1
vote
1answer
92 views

AVR registers location

There are four types of registers in AVR. \$r_0\$ - \$r_{15}\$ witch used for CPU's calculations. \$r_{16}\$ - \$r_{31}\$ witch used for user's temporary data storage. Registers for I/O statements. ...
4
votes
1answer
656 views

What actually is a shadow register?

I noticed the term Shadow Register while going through a datasheet of a TMS320F28335 DSP. What does it actually mean? Does it have a physical location in the CPU as ...
0
votes
1answer
188 views

Difference between a n bit Latch and a buffer

What is the difference between a 8 bit buffer and a 8 bit latch? Are they both used for the same purpose? The 74LS273, is a buffer or a latch?
2
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5answers
151 views

How does register type modifier work on different CPU architectures?

This question is to clarify my doubt against this register storage class. when a variable is register qualified ,compiler puts the variable in a cpu register other than RAM for ease of access. so ...
0
votes
1answer
112 views

How does a 8 bit register bank hold 8 regsiters of 8 bits each?

In 8051, there are 128 bytes of RAM. Of which, 32 are set aside for registers in the form of banks, 8 registers to each bank. ...
3
votes
2answers
139 views

Is it possible to exchange the content of two registers in a single clock pulse?

There are two register R1 and R2. How is it possible to exchange the content of R1 and R2 in a single clock pulse using Common bus architecture?
0
votes
2answers
105 views

Why are bitfields in register not sequential?

Why are the bit-fields in the register not sequential? For example, consider an 8 bit register X . X will have bits 0-2 with flags and 3-6 may be reserved and bit 7 may again represent some flag. Why ...
0
votes
0answers
86 views

Registers & Buses

My task is to design a schematic for a register that has an input of clk and i[7:0] which is an 8 bit binary input interpreted as a number and an output of F which goes high if i was equal was to 127 ...
4
votes
2answers
257 views

How can a shift register be used to debounce a switch?

This is the problem: This is the proposed solution: What I don't understand: The button bounces in the setup/hold time of the input of the circuit, making the FF go into a metastable state ...
2
votes
4answers
382 views

What is important in computer clocks' signal: signal edges or intervals when signal is stable? Will multiple value propagation occur?

I am trying to figure out some basics of digital electronics. We have all seen the squared graph of the computer clock signal: I have read multiple articles on the Internet and still can't figure ...
1
vote
2answers
160 views

What is the meaning of “Register.Rd”?

Reading Hennesy's book "Computer Organization and Design" it is mentioned "Register.Rd" and "Register.Rs" but what does it mean? The .Rd, .Rt and .Rs parts I can't understand, on page 365:
0
votes
1answer
86 views

How can a simple operation such as moving data from one register to another can be encoded into an instruction and executed in a single clock cycle.? [closed]

The simple point I'm trying to make for an essay Im writing. I'm completely at a loss as to how to answer this. Any help available? Sorry, I know this is not a well formed question but I've got no ...
0
votes
1answer
72 views

Shifting between PWM options

I'm using a Freescale MC9S08DZ60 microcontroller, and Ive written the code for applying PWM on a specific pin.'This is an attempt for Breathing Effect of LED, a question i had already asked - LED ...
3
votes
1answer
301 views

Converting AVR assembly to machine code - addressing registers?

In AVR Assembly - I want to work out the machine code representation of the following: ANDI r18,$10 I know the opcode for ANDI is ...
2
votes
2answers
179 views

What does register and bus size depend on?

So here is a hardware sequential multiplier depicted. Number A is 51 bits width, number B is 48 bits width. I have to choose the most efficient size of buses and registers (optimize according to ...
5
votes
9answers
862 views

Microprocessors/Microcontrollers - Do registers have addresses?

My Embedded Systems professor keeps referring to the memory locations of registers as their respective "addresses". I'm confused by this; I was always under the impression that in any microprocessor, ...
2
votes
3answers
146 views

What is the mechanism behind RO or WO and WR registers?

In embedded systems you have read only and write only registers. How are the two type distinguished in the netlist? I can not understand how one build a flop which you can only write and not read ...
0
votes
1answer
1k views

What does the “Q” in “Clock-to-Q delay” stand for? [duplicate]

Possible Duplicate: Why is the output of stateful elements often named Q? A register has D (data) as input and Q as output. What does the Q stand for? I'm having a hard time searching for ...
3
votes
3answers
390 views

Can I pass a bit register as a function argument in Hi-Tech C compiler for PIC16?

Is there a way to pass a bit from a PIC's register as a function parameter? Taking, for example, the PIC16F887, its registers (SFRs) and individual bits are defined as fallows in the corresponding ...
2
votes
1answer
499 views

Access Register/signal from Multiple Modules (Shared Memory)

I want to implement a data register to store up to 256 8 bit chunks (VHDL). I also need to to be able to access and modify these values from multiple vhdl modules. One module will access the register ...
2
votes
2answers
302 views

Verilog asynchronous reads of regs - and design question

I'm trying to understand what the following bit of behavioral code, what kind of hardware it turns into: ...
2
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3answers
575 views

Understanding Flip Flops/Registers in Low Level

So I'm reading "Elements of Computing Systems" trying to really understand how everything works underneath (Any other book/article suggestions that would help would be amazing) Since eventually I want ...
1
vote
1answer
107 views

Data transfer between FFs in a CPU

I was in computer organization lecture and when we wrote what the CPU does during an add instruction (like micro instructions) something got me thinking. I didn't understand how we let one of the FFs ...
0
votes
1answer
73 views

4 Bit Register not loading properly

Basically I have a 4 Bit Shift Register that I am trying to get to work. From my understanding when I send a pulse of 1-1 to inputs S0 and S1..it is suppose to do a parallel load. I have ensured that ...
6
votes
5answers
240 views

stack cache instead of registers

Is there a processor that do arithmetic operations on a stack and not on registers? To keep performance, of course, that processor should cache top block of a stack in the same type of memory that is ...
4
votes
3answers
589 views

What is the main difference between registers, bit fields, and flags?

In school I was accustomed to programming various registers when working with microcontrollers to manipulate their behavior. At my job registers are now referred to purely as bit fields. The word ...
5
votes
1answer
276 views

One-clock increment operation in a three-bus CPU architecture

In his chapter on CPU design, Edward Bosworth introduces the following three-bus architecture: One of the main design aims of this circuit is to be able to increment the program counter PC in a ...
0
votes
1answer
192 views

Store frequency value

I'm not much of an "electrical engineer" but the required courses in my CS degree have given me enough to [albeit just barely] understand a few things, so don't judge me if what I ask is complete ...
4
votes
3answers
1k views

Do AVR registers and ports need to be initialized to zero?

During the initialization routine of my code I use to do such things as: clr r0 ; will always stay zero and: ...
1
vote
2answers
334 views

early accumulator based machines

Wikipedia says that many of the early machines were accumulator-based machines. My guess is that in those machines the accumulator did not play the role of a speed-up register as do registers in today ...
1
vote
2answers
438 views

Lighting 128 LEDs from shift registers

My question is on lighting 128 LED's from shift registers. I had originally considered using a string of 16 74HC595's but upon further research, it appears they would not supply enough current to ...
2
votes
1answer
2k views

How do I select what values to load in CCPR1L register (for generating PWM signal with PIC)?

I need to generate PWM signal with PIC18F2550 microcontroller at near 20kHz. I read the datasheet, I found it too complex and confusing, then I started to search for a sample code on the net to ...
1
vote
3answers
244 views

what happens when the carry bit is zero in addition/subtraction algo for hardware

This is the algorithm in flow diagram for addition and subtraction in computers. A(s) is the sign bit of A B(s) is the sign bit of B //(s) denotes the subscript E is the register that has a ...