Questions relating to the routing of printed circuit boards (PCBs) which involves the placement of tracks on the board. It may be performed manually however many PCB CAD programs provide an autorouter to assist in the process.

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6
votes
3answers
266 views

How to connect these pads

I have trouble connecting a THT HDMI Connector to a pcb: The HDMI Connector I'm talking about is this. The holes are too close to go in between them: (The blue line is 0.15mm thick) Is this ...
0
votes
1answer
44 views

What is Partial Crossbar Interconnection

I have difficulties understanding the concept of Partial Crossbar Interconnection and I could not find any reference on internet to read on. I have the photo below from a lecture slide of many years ...
0
votes
0answers
18 views

Routing LFPAK MOSFETs

I am routing a PCB with MOSFETs in LFPAK (aka SOT-669, Power SO8) packages for the 1st time. They look like D2PAK. The manufacturer, NXP, advises to draw identical polygons on top and bottom sides, ...
0
votes
1answer
178 views

Altium: PCB ground plane and routing

OK so I've been asking around and reading how to connect ground pins to ground. Some said create vias to the ground planes. But should I do that for every pin? Because sometimes when I create via to ...
1
vote
1answer
111 views

Altium: PCB routing

I have several questions: I'm not sure how to deal with grounds or Vcc when routing. So I have capacitors/resistors connected to the Vcc of the FPGA, so I connect it directly to the pin. But how do ...
0
votes
1answer
58 views

Altium: Connecting routes through different layers

I know how to route and create vias to connect the track from one layer to the next (i.e. layer A to B then to C). But is it possible to connect tracks from one layer to a specified layer directly ...
1
vote
0answers
45 views

Altium: Routing in different layers brings me back to top layer

Routing on the top layer is fine. But whenever I try to route on a different layer, it automatically brings me back to the top layer and routes there. Am I missing a step? Let me make this more ...
1
vote
1answer
44 views

Altium: the shortcut key +/- don't move me to the next layers

I have created multiple layers from the stack layer manager. Also created vias from layer 1 to 2, and 1 to 3. When I clicked okay, the layer image didn't get updated, meaning it didnt add the vias I ...
0
votes
0answers
40 views

Eagle cad dimension measurement showing on tob and bottom layer when creating Gerber files

I have an Eagle design as shown in the 1st image attached. The dimension measurements are on "dimensions" layer 20. When I create Gerber files then look at it in a viewer, I get the measurement ...
0
votes
1answer
99 views

stm32f4 HSE crystal

I'm trying to set up an HSE for my STM32f4, using this crystal. but there are 2 pins : OSC_IN and OSC_OUT, but my crystal only has one output. So what do I link OSC_IN and OUT to ?
3
votes
4answers
149 views

Routing USB2 signals

On this board USB2 signals are routed using smooth lines instead of the usual 45° routing seen on the rest of the board. Does this offer advantages or is this even necessary? A theoretical advantage ...
9
votes
5answers
1k views

Anything bad to place a via on a pad?

Once I mistakenly placed a via on 0603 pad and didn't have any problem on soldering. I am routing another board now and I could save some space by placing some vias (0.3mm) on a 0603 pad. I wonder if ...
0
votes
1answer
64 views

Power Supply Router implementation

I am looking for the general approach (technique/strategy, componentry used, etc.) to implement what I am calling a power supply router, although perhaps there is a more precise/accurate term for it. ...
2
votes
3answers
222 views

'Unrouting' a ground plane on Eagle

I have been using Eagle for quite a while now but there is one thing that continues to bother me while I am using it. I have made the ground plane cover the shape of the board, however, when I am ...
3
votes
1answer
49 views

Purpose of deleting internal PAD

I just learned today that, when you're routing the board you can delete the pad of through hole connectors on the internal layout. Some company even ask to delete all the internal pad that are not ...
5
votes
1answer
172 views

Things to be aware of when using voronoi shaped traces

I was thinking of giving voronoi shaped traces (e.g. http://publications.csail.mit.edu/abstracts/abstracts05/rus/rus.html for those who need an example, or just google image search it) a try. In ...
2
votes
1answer
115 views

Should vias be used for every GND connection?

When making a two layer board with the bottom layer being a GND plane, should every GND pad for ICs and passives be directly connected to the GND plane using a via, or should I route all of the GND ...
0
votes
0answers
35 views

TFBGA180 package and 2 layers (top & bottom)

I have a problem with a TFBGA180 package which I have to wire in EAGLE (freeware licence) which supports only 2 layers. I know that I won't be able to bring out all the connections but I really need ...
0
votes
0answers
38 views

Lane size vs Pad size

Currently I have a problem with routing a 56-pin-µC with eagle on a board. I want to make the supply lanes a bit broader than the signal lanes, but the suggested pad size of the µC is already 0.012, ...
6
votes
2answers
972 views

Length Matching Differential Pairs

I am routing a PCB with an Ethernet connection and I am having a bit of trouble deciding on how best to route the TX and RX differential pairs. I have done the impedance calculations to figure out the ...
3
votes
1answer
115 views

Altium 'Adaptive' Routing

I recently switched from Mentor Graphics Expedition to Altium 14. I really like a lot of Altiums features but efficient routing still eludes me. In mentor my typical workflow was: Place components ...
3
votes
2answers
454 views

Why we need the PCB Panelised for assembly?

I have a PCB finished in invidividual size for customer but they gave me comment that it can't be used by their assembly vendor and ask me make the new batch for them, When we make the board in 2 up ...
5
votes
4answers
2k views

How can I make a decent ground plane in Eagle?

I've made a couple of simple PCBs as a hobbyist, and for the first time now I want to add a ground plane pour but I'm having some issues. As I have currently understood I need to: Create a polygon ...
4
votes
2answers
520 views

Understanding source and return current flow on PCBs

I'm looking for advice and tips related to PCB board layout and signal+ground trace/track routing. I'm designing a 2-layer analog-only PCB that has several I/O signals leading to and from other ...
0
votes
0answers
222 views

NOT consistent Euler Paths in logic diagram. What now?

i'm working with non-series-parallel arrangements, something like this: as you can see, the euler paths in pull-up and pull-down are differents. for example, in pull-up we have "abcde" and in ...
1
vote
1answer
75 views

Routing Audio Ground - needed or not?

I'm trying to build a guitar pedal switcher (efectively a box that provides multiple effect loops that can be independently bypassed from a single microprocessor) and while building a working ...
2
votes
1answer
541 views

RMII MAC side routing and signal integrity

I have some signal integrity and EMC questions. In my board LPC1768 RMII interface is connected to LAN8720. Because of pin locations some RMII signals must go through bottom layer. This is a four ...
1
vote
1answer
581 views

DDR4 routing / spacing guidelines

Where can I find the source of routing guidelines for DDR4. I'm talking about things like DQ to DQS timing, maximum length difference in ps for address and command and maybe maximum parallel run ...
3
votes
2answers
157 views

Multiple traces for single connection in Eagle

I'm manually routing a power distribution network in Eagle, and am trying to follow the IC vendor's recommendation to attach vias to the power plane both left and right of the bypass capacitor's ...
1
vote
1answer
187 views

Can I connect all ground connectors via the ground fill?

I am working on a very, very simple two-sided PCB design that connects one 8-pin header with 6 audio jacks, each of which has its right channel and ground connected. All grounds are connected via ...
2
votes
1answer
219 views

Four layer PCB power plane

I need to design a system on a four layer PCB. The layer stack-up from what I know would be signal / components ground plane power signal My problem is, I have a system with a power supply of +-5V ...
2
votes
1answer
608 views

How to route to a hidden pin in Altium

I'm using Altium Designer 14.2.3 and I have a connector on which are always two pins connected to each other. In my schematic library I have configured the Pins to be hidden and connected to the ...
0
votes
1answer
74 views

Power analysis after placement and routing of ASIC

How can I procure the files stating the details of power consumption of the chip after PNR in SOC Cadence Encounter?
3
votes
2answers
389 views

Bypass capacitor placement in Eagle

I've just placed a large FPGA in a QFP package with 144 pins in the middle of my board, and would now like to add bypass capacitors on the power supply pins. The power and ground pins are either next ...
2
votes
1answer
86 views

Eagle: Pins on FPGA exchangeable, depending on configuration

I'm trying to do the PCB design, using Eagle, for a small board with an FPGA that basically just routes the I/O lines to the outside. So, for the purpose of routing this board, the pins are basically ...
1
vote
1answer
2k views

Where is Cadence's Allegro Design Entry HDL 16.5 Snap o Grid Option?

I am looking for the snap to grid option? Any idea how to enable it? I did try looking on Cadence forums and documentations, but I did not find anything. Also any idea how I can move ...
10
votes
2answers
1k views

Acute angle routes in PCB

Following is from a PCB that I am presently working on. That particular path signals are of 100-400kHz signals. Is there any problem in having routes of this kind?
0
votes
1answer
381 views

Altium trace width rule applied to blanket only

In Altium, I set a rule for PCB trace width and clearances for a high current net but I only want it applied to that blanket that I have created in the schematic. I have monitoring lines that wont be ...
1
vote
2answers
285 views

Have I routed this PCB correctly per the schematic

This is my first PCB for production, and I'm not sure if I've correctly routed it. Mostly I'm concerned about trace running from pin 5 of IC1 to C3/C4 and how that picks up the +5V, which I've routed ...
1
vote
1answer
306 views

Routing rules for components in Altium

Is there a way to make a speciffic routing rule applicable only for selected components (or component class)? I want to define some "routing width" rules that will start routing the same net (e.g. ...
0
votes
1answer
345 views

How do I create “beveled” T-intersection traces in Eagle CAD?

Frequently it is convenient to route traces on a PCB such that some other traces or pads are at right angles to a common bus. However, this creates "T" intersections which have 90° angles, which can ...
2
votes
2answers
3k views

Any-angle routing in Altium?

I have a design with a very thin and curvy board shape, so any-angle routing is absolutely required. My favorite EDA software is Altium, so right now I have only two options, both bad, for how to ...
23
votes
2answers
2k views

What is Manhattan routing?

In an answer by The Photon he mentions 'Manhattan routing' in regards to PCB design. I haven't found a lot of relevant information about this term on the internet; therefore the question: What is ...
3
votes
1answer
611 views

Are traces exiting a pad at an angle bad?

I have been told in the past that you should always have traces leaving a pad on a straight line. The reason I was given was that it could create an acid trap. From what I have read this is not ...
4
votes
2answers
3k views

What is the best way to layout a PCB with crystal oscillators and MCU?

I have heard that the clock circuit is a noise source and that the clock circuit is also sensitive to noise. I believe that keeping the clock circuit close to the MCU and keeping other routes or ...
11
votes
2answers
2k views

Purpose of “wave shaped” PCB traces

On some PCB designs, specific traces are routed in curious ways. This probably has to do with high frequency design considerations and general signal behavior that I am not familiar with. Let's take ...
1
vote
2answers
309 views

Routing in Altium

Here is a picture of board: I want to route pad 23 to 48. But the path gap is narrow. So I am not able to route it. Auto routing also couldn't route. I changed the design rules for solder mask and ...
15
votes
2answers
548 views

Why would the VCC/GND pins of an ATtiny26 not be aligned?

In the following pinout diagram for an ATtiny26 microcontroller, a 20-pin IC: The VCC/AVCC and GND pins aren't aligned. Surely it would be easier for PCB design to connect these by going straight ...
5
votes
2answers
436 views

Soldering lifted central pin of TO-252-5 package

I found a very nice voltage regulator of ST (LD39300). But the LD39300PT-R has a package with a lifted central pin (TO-252-5, DPak (4 Leads + Tab), TO-252AD). Here is a photo: I just want to do a ...
6
votes
1answer
158 views

Its ok use different layers for power?

For example in a double side board I'm using one layer as gnd and the other layer as power, and then I route the whole circuit inside the planes. Is that ok? Because I saw that usually both sides are ...