3
votes
1answer
274 views

How does the DDR clock compensation capacitor improve signal quality?

I saw in some DDR3 designs that there is a capacitor between differential clock lines, for example the image below: In the document this image comes from it says: On the DDR3 SDRAM DIMM, there ...
7
votes
5answers
9k views

Why put a resistor in series with signal line?

A lot of times in circuits I see a resistor placed in series in a signal line and sometimes even in series with an MCU's VDD line. Is the intention of this to smooth out noise in the line? How is this ...