About tools to simulate circuits. Specify the tool used.

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Quartus Waveform File Representation

I have selected the inputs as 8 bit count values that increment over time. The 8 bit value should be parallel in and parallel out. But the bits are spaced over time. Can you please explain why the ...
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18 views

Harmonic distortion sweep in QUCS

Is there a way to measure THD or THD+N vs frequency in QUCS? THD+N: It would need a notch filter that tracks the AC sweep to remove the stimulus signal, and then compare the RMS amplitude before and ...
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37 views

Missing Bipolar Definition for “PNP”

I've been making a schematic diagram for an LDO which has a 'Vref' subcircuit which contains 4 PNP bjt's. Now when I run the schematic to produce a netlist, a fatal error (image shown) occured. How ...
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21 views

Help with HSpice [duplicate]

I got this PC with a HSpice installed and whenever I try to do a simulation, the I get this error message mid-way: ...
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1answer
45 views

What free software can be used to simulate transmission lines and other RF circuits? [closed]

Technically, one can use LTSpice as it features a transmission line model, but obviously it doesn't like dangling nodes (ie. open lines) and isn't really suited for that purpose anyway due to lack of ...
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47 views

What's a .lis file really supposed to look like

So I'm trying out HSpice. Suffice to say, I didn't acquire it through proper means. So now I'm actually thinking I got a bogus software (but not a malware) or that I failed to install it properly. ...
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37 views

how to get delays of a circuit under process corner in hspice?

my circuit is composed of a chain of inverter (delay line), and i want to see how the delay of this chain of inverter behave in process corner? i want to know if the delay line will be still ...
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1answer
30 views

Schematic Editor to go with HSpice [closed]

I've been using LTSpice for a while now and I love it (except the fact that zooming to the sides is rather restrictive). But, I need more accurate simulations, so I chose to migrate to Synopsys' ...
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16 views

process variability simulation in hspice

in order to analyze the impact of the process variablity on my circuit, i want to simulate a delay line and logic cloud (different gates ) under process corner in hspice. first i should to consider ...
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3answers
38 views

Where do I find models for various common op amps for use in LTSpice

I have just started using LTSpice. I need to simulate a circuit with op amps, where the parasitic elements of the op amp may effect performance. So I need to try different 'real' op amps to see which ...
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2answers
45 views

Reasons for a simulated circuit to oscillate when the physical circuit does not

I am building a circuit to drive a solenoid with current control. I am driving it with a circuit based on the improved howland current pump. Interestingly my simulated circuit displays a large ...
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1answer
22 views

Displaying signals in testbench from counter VHDL

Say I have a count signal in a counter VHDL file and want to display this in my simulation output, what would I have to do to my testbench to output such data?
2
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1answer
35 views

In which physical unit is 'clock drift' measured?

I would like to model a clock signal with an drift parameter in my digital simulation. The current implementation handles: frequency / period phase -360.0 .. 360.0 degree duty cycle 0.0 .. 1.0 ...
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1answer
52 views

VCO doesn't work

I've tried to design a voltage controlled oscillator by adding a varactor to a Colpitts oscillator. However simulation shows no change in the oscillation frequency as V3 changes (0.04v to 10v). I ...
0
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1answer
55 views

Flip Flop D Sequence

I want to create a game like "pimball" using 4 leds to state the game. One exit to define if the game is still running. And 2 inputs that are switches. 1) To begin with, the first is to assemble 4 ...
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1answer
42 views

IP simulation with Vivado

I have just used an IP in the IP catalog called Multiply accumulate. This IP is supposed to multiply 2 inputs and accumulate the result. I made a control module for it(mac_control) where I instantiate ...
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1answer
38 views

MSP430 - how to check addressing types

I'm programming a MSP430 in C language as a simulation of real microcontroller. I got stuck in addressing modes (https://en.wikipedia.org/wiki/TI_MSP430#MSP430_CPU), especially: Addressing modes ...
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25 views

How can I connect two design units in modelsim simulation

Motivation: When I build a hardware component that consist of many sub components, then I need to test the sub components before I connect them all up and make a thorough testbench in VHDL. In some ...
3
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1answer
46 views

How to add a multi-emitter BJT to LTSpice?

I want to simulate the standard TTL NAND gate which contains a multi-emitter BJT transistor in LTSpice. I've searched the components available in LTSpice but didn't found this component. How can I add ...
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38 views

How can I convert Mentum Planet .pln (or .msi) file to SPLAT! .az and .el format?

I'm trying to split and convert a single Antenna Radiation Pattern definition file in .pln format (Mentum Planet) into a couple of SPLAT! .az (Azimuth Radiation pattern) and a .el (Elevation radiation ...
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1answer
37 views

Is there an alternative to B2.SPICE A/D for Mac OS X?

I've tried B2.SPICE A/D on Windows and I liked it. Is there an easy-to-use application like B2.SPICE A/D that uses SPICE and allows drawing the schematic of the circuit and simulating it?
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1answer
39 views

LTSpice Instrumentation amplifier simulation output

I am using an LTSpice model for an instrumentation amplifier (AD8222) to learn how to simulate things in LTSpice. My output is not what I expected. My model is based on this description: ...
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1answer
35 views

FPGA: what is the input of Timing and RTL simulation?

For FPGA design, compilation of the design produces a bitstream. What is the input of the simulation (Timing and RTL)? Is it the bitstream itself? Another file? For Altera specifically, what are ...
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49 views

FPGA Simulation - does it need FPGA hardware?

Reading through Altera documentation on FPGA programming, I can see that the design flow is made of Design -> Compilation -> Simulation -> Programmation -> HW Verification The design consists of ...
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1answer
44 views

Equivalent resistance of circuit

I have a simple resistor circuit that i would like to know the equivalent resistance of(as seen from the multimeter terminals): The image is from Multisim and the resistance is here measured using ...
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1answer
34 views

OrCad issue: Logic circuit simulation…ambiguous output

After simulating the following logic circuit(in OrCad),the resulting output -'y' is unclear. It seems to me that everything is fine, yet the result is ambiguous. Can you, please, explain what is the ...
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21 views

mosfet bootstrap capacitor behavior simulation

I try to simulate High and Low side Mosfet driving circuit without luck. I use OrCad and spice files taken from irf.com for IRLRU7843 Mosfet and IR2301 Mosfet driver. Is any idea how to get valid ...
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32 views

Start up circuit in power supply independnent biasing

I simulated the start up circuit in a power supply independent biasing. I know that the start up circuit is there to makes sure that there is current fllowing thought the transistors preventing the ...
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1answer
22 views

Transient simulation in Cadance

I have been trying to do a transient simulation of a Power supply independent biasing circuit in Cadance but how much ever I try I do not see the transition of the states. I always get only the steady ...
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2answers
42 views

How to simulate P-E loop of a lossy capacitor?

I want to simulate the P-E loop for a lossy capacitor (figure 1c below). For this purpose it's enough to plot the charge Q across the capacitor vs. the voltage V across the capacitor because \$P ...
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33 views

Ziegler Nichols PI Tuning : Integral gain too high

I am tuning my PI controller in MATLAB using Ziegler Nichols method in which my plant is the car Engine and I have to stabilize the engine speed to lets say 900 when throttle is not pressed. In order ...
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2answers
31 views

Simulation of LM384 / LM3886

I'd like to simulate an LM384/ LM3886 in Protues. but I can't find any library for them. can you help me? Is there any library for pspice or another simulation software?
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16 views

Xilinx Coregen FIFO as ZeroDelay model

My VHDL design contains a FIFO generated by Coregen from Vivado 15.3. I try to debug the design with a ZeroDelay simulation. But the core is not Zerodelay and makes short changes (much shorter that a ...
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48 views

Export Modelsim waveform as image from command-line

Is there a way to export Modelsim/VCS waveforms as images (png, jpeg or SVG)? Currently the only method I know of is to fire up the simulator, run the simulation and then either do a Print Screen or ...
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61 views

Automatic parameter search for a given output in LTSpice

I am simulating a circuit on LTSpice and was wondering if there is a way to set output parameters for LT to aim for by adjusting values of other components. I have used some software in the past that ...
2
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2answers
87 views

Simulation difference between two similar OpAmps

I preface this with saying that at one time, many many years ago, I had taken some EE courses. I remember only a little. I was simulating a simple non-inverting amplifier used in a DC setting as a ...
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49 views

Pulse for IGBT Rectifier in simulink

I have connected a Permanent Magnet Synchronous Machine(PMSM) to use as a generator(mechanical torque input -> 3phase output) to a IGBT bridge rectifier and I use PWM generator for the gate pulses. I ...
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43 views

CellularRAM CE# signal confusion

I'm trying to write a simple memory controller that does synchronous reads/writes for the Micron CellularRAM on the Nexys2 board (http://www.micron.com/parts/psram/cellularram/mt45w8mw16bgx-701-it). ...
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1answer
77 views

10k potentiometer symbol meaning?

i am trying to map this schematic onto a virtual breadboard but i dont understand what the 10k potentiometer symbol represents. am i supposed to connect the 5v terminal to the positive end of a ...
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35 views

Include libraries in GHDL

I'm using GHDL to simulate some designs that I'm doing. Now, I included the float_pkg package to work with floats in Sigasi but when I'm simulating in GHDL it ...
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2answers
79 views

It is better to fix x's in the simulation or in the design?

I have a question about how to deal with x's in Verilog netlist simulations. I have a disagreement with another engineer (who is a bit more senior than I am) about what the right approach is. ...
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88 views

How to study temperature influence on Li-Ion Batteries?

I would like to study and simulate the influence of the ambient temperature on a given Lithium Ion Cell. Behavior while charging or discharging for both internal Resistance and capacity. My ...
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47 views

Altera “fiftyfivenm” and “twentynm” - What is that?

I know many Altera products from Arria, Cyclon, Stratix and co, but what are the: fiftyfivenm twentynm devices? I assume these are devices, because there are ...
2
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1answer
45 views

Setting manual thermal voltage for a diode in LTSPICE

I want to simulate some series and parallel connected solar cells with the same reference temperature but different operation temperature for each cell. To do so, I need to configure the thermal ...
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1answer
80 views

Some pointers on how to begin VHDL writing

I'm currently doing some tutorials and reading some books on how to write VHDL. As I'm curious and learn better with hands-on tutorials I'm going to start implementing my projects that will serve me ...
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1answer
211 views

Simulating accelerometer in proteus

I am not able to find any libraries for simulating accelerometer in proteus. Is there such a library? If NO, how do i simulate an embedded system that has an accelerometer? Thanks
0
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1answer
66 views

Synthesis tool free-source [closed]

I'm currently learning VHDL and to simulate the code that I write I found out GHDL (open-source), which I haven't tried yet but I think does what it needs to be done. In order to synthesize the VDHL ...
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50 views

How to set phase delay for a three phase igbt rectifier

I have a three phase igbt rectifier like so. three phase voltage = 690V. how to set the phase delay and DC link capacitor value(F) to get Vdc = 1070. I have updated the complete simulation with the ...
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153 views

IGBT vs. SCR rectifier

I simulated three phase rectifier using a thyristor like so: I get the expected result. But if I change the thyristors to IGBTs as shown below, it does not work. Why do these two circuits behave ...
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71 views

How to solve a resistor nest efficiently

Of course, one way to do it is to split it into series and parallel circuits and apply Kirchhoff's law, but that seems inefficient. Is there a method by which a circuit nest can be solved (finding ...