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Question about an LC oscillator

I saw a previous question about an LC oscillator and I wanted to know how it works. What I figured out is, that the current across R2 is approximately always constant (Q1 base current doesn't drop too ...
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1answer
35 views

Designing and simulating a common source amplifier circuit

This is the problem: And this is my design for R1 and R2: So, using B2 Spice simulator I made this circuit according to the design: Vin_ and Vout_ are voltmeters. But the problem is that ...
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1answer
85 views

Why feedback is activating at more than 4V?

In this circuit: I don't get why the current start flowing from more than 4V. I thought was due to threshold, but the same happens with an NPN as M2 or using an BS170. With this last one, ...
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23 views

Analog relay in logisim

I am attempting to create a 4PDT relay in logisim to play with mechanical logic circuits. I am not sure if it is possible to simulate the analog connection of the relay, where signal can flow in ...
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0answers
13 views

How can i model and simulate transformers in PSCAD?

I am trying to model distribution transformer in PSCAD(Power System Computer Aided Design). I have used the direct block that is in PSCAD, but it has limited input parameter. The input parameters are ...
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31 views

Channel simulation using convolution

I have to simulate channel noise (cable in my case), I have voltage characteristics of cable with me and I'm using convolution with incoming data to get the amplitude response. I also have forward ...
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2answers
49 views

What does delta stands for in ModelSIM?

I ran a simulation for a combinational logic circuit with 8 inputs, 4 outputs inside MODELSIM. When I view the simulated waveform everything looks fine, however when I export result to a list file ...
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1answer
26 views

VHDL: Simulating Delay for ISE UNISIM components

I have extracted VHDL source of my design from Xilinx ISE. It uses UNISIM library to model Look-Up Tables and Flip-Flops and other components. When I simulate my VHDL design (a combinational circuit) ...
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2answers
75 views

IR2110 LTspice simulation weird behaviour

I am obtaining weird voltage behaviour at the gate of my high side mosfet controlled by IR2110 which is controlled by PWM. PWM configuration: Vinitial = 0 Von = 5v Tdelay = 0 Trise = 7u Tfall = 7u ...
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1answer
64 views

40% Channel Utilization on 1Mb Satellite

Using the Slide Window technique, consider a satellite channel with: 500 byte frames sends 270 ms delay on send and receive 1 Mbps rate communication protocol is Sliding-windows Ignore the length ...
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1answer
35 views

Units of area parameter in ngspice

Can anyone tell me what are the units of area parameter used in ngspice?
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2answers
48 views

Can this gyrator handle high current and/or high voltage?

Since I first got introduce to the Antoniou Inductor while in university, I've always been amazed at it. I've never built or used one, but I am thinking about using it to simulate an inductor for a ...
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2answers
74 views

Problem simulating a fixed transconductor with LTSpice

I am simulating a fixed transconductor circuit with LTSpice. When I apply \$1\$V for input voltage, (for DC Sweep) the voltage of collector of \$Q_1\$ has good amplitude (\$30\$mV to \$330\$mV) while ...
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1answer
73 views

FPGA simulates well and passes timing check but fails in PCB

So you have finished your FPGA design. You have simulated it with an extensive test bench created by a different engineer and it works, event at speed after it has been compiled, placed and routed. ...
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1answer
24 views

Can I get Simulink blocks from commlib individualy

We were simulating communication with DPCM modulator in school. I saved the Simulink scheme and now I would like to simulate some more situations at home, but my commlib doesn't have the modulator we ...
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1answer
41 views

How to calculate logic gates power in microwatts in Matlab?

I am designing a circuit in Matlab2014 Simulink using logic gates and I am giving Pulse and Constant at the input of the circuit but I cannot measure current and voltage at the output of the circuit. ...
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3answers
79 views

What facilities/methods exist to debug and simulate programs for PIC microcontrollers

In the university, even though I did do some PIC programming and project, the project was quite simple. We could always put in a blinking LED as a sign of life into our program or have the code write ...
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20 views

Modelling and Simulation with Power Factory 15.1 Problems,help?

Using the Power Factory 15.1, I am currently modelling a electrical power distribution network as a initial goal.The problems is every time i run the load flow analysis the Slack generator always ...
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33 views

Proteus Simulation Step Size

Is there anyone that knows how to configure the step size of the Proteus Simulator? I want the simulation to move forward one code line every time I press the step button.
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1answer
110 views

Help With Simulating Common Collector Amplifier In PSPICE

I have included as much information as possible, so it should just be a matter of pointing out something simple (hopefully). I am trying to model a biasing circuit for a Common Collector BJT ...
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2answers
67 views

Trouble with CE BJT amplifier

I have the following circuit : It is meant to amplify signals in microvolt range and around 100 MHz. Now in the figure, the transistor is an ideal one. So it works fine and as expected. But as soon ...
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1answer
29 views

Logism Signal Generator

I am using Logisim and I can not work out how to make sine wave. I have searched on google and can't find out how I can do this.
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2answers
278 views

Op amp has a biased output

I'm designing an op amp circuit to amplify 20mV, 18kHz square wave up to measurable levels (~2-3V). Why is the output signal: Biased at ~400mV Triangular (high output capacitance? is that a thing?) ...
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1answer
59 views

Improving my impulse counter circuit

I just started studying electrical engineering this semester, and I'm currently working on following impulse counter: The circuit is basically a power supply regulated to 5V, a pendulum acting as ...
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28 views

transient analysis in aim spice

How do I carry out the transient analysis of series RLC circuit using AIM Spice? I can't figure out what values should be given for step size and final time. Also, I was seeing some tutorials and ...
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0answers
21 views

All Xilinx Blocks must be contained in a level of hierarchy with a System Generator Token error in xilinx

I am trying to simulate psuedo random data generator on simulink but I am getting this error ...
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3answers
59 views

Stepped Sine Wave in Spice

I'm interested in simulating a circuit using a stepped sine wave input. I want to sample a sine wave at regular intervals and have the output constant during each interval, making an output that looks ...
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4answers
138 views

How to measure DC Operating Point of a simple transistor circuit

Could someone explain to me how to find the DC Operating point of this circuit? I need to find it by running a simulation and probing the circuit, not solving for it mathematically, and I'm not sure ...
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1answer
85 views

Three-Phase Thyristor Converter Simulation Question

I am required to simulate a three-phase full wave thyristor converter using MATLAB Simulink. The circuit I have so far is given below: The three input sources are 230V each at 50Hz, the first ...
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55 views

Simulating TI Products in smartspice (without TINA-TI)

UPDATED PROBLEM I am interested in simulating a TI Operational Amplifier OPA188AID and am having some issues with correctly creating a symbol in smartspice using the model provided on TI's website. I ...
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62 views

Defibrillator simulation in Matlab/Simulink

Guys'm doing work at the university, to deliver on Friday the 17th and my problem is as follows. My aim is about defibrillator and I have to do the simulation and generate a pulse same as ...
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1answer
62 views

Is there any offline circuit simulator software that can simulate a noisy power supply?

I have been using Circuit Wizard (Its the only offline program that I can find!). Unfortunately, it is really basic, and I have outgrown it. I need to simulate a 5V circuit with a noisy power ...
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73 views

1 Mbps satellite channel with a 270 ms delay

Consider 500 byte frames sends on a satellite channel with a 270 ms delay on send an receive by 1 Mbps rate. by ignore the length of ACK message and using Slide Window technique, how many bits need ...
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1answer
74 views

VHDL internal signal assignment

I am new to VHDL and tried to implement a simple example from a book, what represents a 2bit register and the testbench. Compiling the files works well, and signals the stimulate the register (reset, ...
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67 views

Scilab palettes for Three Phase System [closed]

Where can I find these palettes in xcos? Three-Phase V-I measurement Three-phase fault distributed parameter line
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1answer
47 views

Circuit simulation problem dealing with transistor operation

Simulating the circuit below (PMOS charge pump; doubles the input supply), all the transistors are operating in cutoff region when I extracted the .dp0 file. What might this means? I'm using SYNOPSYS ...
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1answer
64 views

Simulating a circuit consisting of MOSFETs

When simulating a circuit consisting of mosfets, when can you say that the MOS should be in cut-off, saturation. or linear (triode) region? Specifically a charge pump circuit utilizing PMOS.(refer to ...
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2answers
366 views

Op-amp differentiator and integrator circuit: resistor and capacitor values

I don't understand how to determine value of resistors and capacitor in differentiator and integrator circuit of Op-Amp. I tried to align the amplitudes of these sine waves. I keep changing their ...
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1answer
92 views

PSpice Op-Amp sawtooh wave

I've got this homework about PSPice and op-amp. I need to make this triangular waveform and sawtooth(?) waveform of non-inverting op-amp circuit. I know the triangle one is 500us like the picture. ...
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1answer
98 views

D flip flop simulation: which simulation output is right?

I have always wondered, what is the right solution to the D flip flop when the input changes right at the rising edge of the clock? I have found two solutions of these online but have no clue which is ...
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1answer
53 views

Trying to understand what is needed for simple circuit simulation [closed]

I'm working on my Capstone project and a major component of it involves designing a circuit that works with the IOIO-OTG, some motors and a battery. I'm trying to find a free circuit software that ...
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21 views

Disable display in Synopsys VCS

I am currently simulating this large piece of verilog that is full of $display commands for debugging. I believe this is making simulation slower so I want to get rid of most of those. Is there a way ...
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153 views

How to create JK flip flop in proteus 8

I want to create a JK flip flop in Proteus 8.0 ISIS simulation tool. This is what I tried, but the problem with this is that the outputs Q and Q' are always zero regardless of what I set J or K. ...
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1answer
151 views

What is wrong with this PSpice simulation?

I am trying to simulate this circuit on PSpice as my first PSpice homework, I'm required to learn to simulate circuits on this software. From calculations, we know that: Ix = 16 A. Current ...
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47 views

How to get OpenCL kernel simulation performance by Altera OpenCL SDK or Quartus II?

I am using OpenCL to program FPGA by Altera OpenCL SDK. However, I don't have an Altera FPGA board now. Thus currently I just want to do emulation or simulation to get performance like number of ...
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93 views

Is it possible to create a custom animated component on Proteus ISIS?

I'm using a subcircuit block, where the inside circuit is like this: When i simulate the circuit in the main sheet, i have to use the "go to child sheet" command to see if the LED D5 is illuminated ...
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135 views

Find IC's Model file (*.MDF) for Proteus

I have a circuit design and I want to simulate and test it on Proteus before implementing it. But some of ICs which I've used give me errors when start simulation. The error was ...
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1answer
77 views

Real world efficiency of a LM3150 Webench DC power supply design?

When designing a DC/DC step down converter with TI Webench with these parameters: Vin min: 11.4 V Vin max: 12.6 V Output : 5.0 V Iout : 8.0 A Ambient temp: 30 ÂșC Then turn the efficiency knob ...
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1answer
102 views

LTSpice Level 2 Simulation CMOS follower

I'm trying to make a level 2 simulation of a voltage buffer made by a CMOS circuit: For this, I have been told to use level 2 CNM25 technology Spice models for the transistors, and I have been ...
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1answer
130 views

8 Transistor Full Adder

I am working on 8 Transistor full adder which is based on 3 Transistor XOR cell. I have studied many IEEE Papers for 8 Transistor Full adder. All have same ckt as above.But the full adder is not ...