Tagged Questions

0
votes
3answers
70 views

Synchronizing SPI ports for higher data rate

I am designing a new board which uses the NXP LPC4330 (Cortex M4 microcontroller) with a XESS Xula2 FPGA development board. In this design, the Xula 2 has limited I/O pins since it is designed to fit ...
0
votes
0answers
74 views

SPI interfacing between FTDI and Lattice FPGA

I am trying to establish SPI interface between FTDI FT2232H and Lattice MachX02-1200ZE. The following code for this purpose compiles successfully and the last SPI_ReadHiSpeedDevice() function returns ...
6
votes
1answer
99 views

Does an SD card in SPI mode respect chip select/slave select? Seems to be resetting in my application

I have an application where I have a microcontroller (NXP LPC1343) which is connected to an FPGA via 16-bit SPI. There is also an SD card using the same SPI port (MISO/MOSI) but with a different CS/SS ...
2
votes
2answers
785 views

Syncing Signals with Global Clocks in FPGAs/CPLDs and Edge Detection

I am a newbie in digital logic design and I'm trying to get my head around syncing external signals to the global clock in an FPGA. For example, the SCK signal/clock fed to an FPGA by the SPI Master. ...
3
votes
2answers
1k views

Any examples of an SPI based protocol with a checksum?

I have an application in mind in which I need to communicate via SPI with an FPGA. Both the FPGA and microcontroller are in our control, and so I have the flexibility to define the protocol as I see ...
1
vote
2answers
2k views

How can I set up an SPI interface between an LPC2132 ARM and a Cyclone FPGA?

I am trying to make an ARM LPC2132 chip and a Altera Cyclone FPGA communicate using the SPI protocol. Specifically, I have the Saxo-L board from KNJN, which has the signals pre-wired between the two ...