Tagged Questions
1
vote
1answer
198 views
Xilinx System Generator: A summary of frequent errors during the Simulink - modelling stage
I wonder if there is a kind of guide or summary about tipical errors at modelling design stage that users tend to do.
Thank you so much for your help.
By the way. Some people ask me why I don´t use ...
2
votes
3answers
451 views
recommendation to learn verilog
To learn verilog, can anyone recommend any web-page or book?
I have never seen such type of a language before, so what you recommend should be for beginner.
