Tagged Questions
2
votes
1answer
446 views
Finding Absolute Value In Verilog Data Designated by System C/Xilinx X
I have been trying to find the Absolute value of an integer which is designated to Verilog core using Xilinx C running on Microblaze, what i have seen is that Verilog treats the negative number as a ...
2
votes
1answer
491 views
FSL Bus Problem in Xilinx FPGA Data Return
I wrote a custom IP peripheral in Verilog and interfaced it to MicroBlaze, using a hardware co-processor option. I can see the peripheral connected on the System Design Diagram. Everything compiles ...
