Tagged Questions

3
votes
1answer
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Multi-Port RAM (1 write port, many read ports)

I have a project where I may need a 128 KB lookup RAM. I have 1 write port which writes the lookup values at the start of the application. I will have more than 2 read ports (I am assuming 4). I do ...
2
votes
3answers
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What is wrong with this attempt at an SDR RAM in Verilog?

I have a Spartan-6 FPGA wired to the AEMIF memory interface on a TI DaVinci DM365 SoC that I control. The AEMIF is set up in Select Strobe mode. I'm trying to implement memory read/write on the FPGA ...