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15

I am posting another answer, just because the last question you had was not answered before. Todbot is completely correct. It will also draw lower power at lower speeds. It also means if you supply it's clock from another processor, for example, you could stop supplying it at any point and then start clocking it later, as long as you do not go faster than ...


13

Yes, most likely that's fine. You have to make sure each chip is set up to expect a ready clock in, not to drive the crystal itself. You have to look at the datasheets, of course, but most likely the devices can be set up that way. However, there may be a less expensive way. Very likely at least one (probably both) of the chips can drive a crystal ...


13

30 MHz is enough that you do need to treat the signal as a transmission line problem. You'll need to pay attention to board layout across the design, including and especially at the connectors. You'll need to bring extra ground pins along with your 30 MHz signal, or possibly use special connectors. You'll need information about the layout of your board, ...


12

No, there is no minimum frequency, minimum clock frequency is 0, or DC. See the specification, page 48. But you will have to pay attention to rise and fall times. Those are 1000 ns and 300 ns maximum, resp. And a longer cable, with some capacitance will influence edges, regardless of frequency. It's that capacitance, together with pull-up resistances ...


12

This post on hackaday links to this interesting article where someone investigates the accuracy of 60Hz mains frequency over time, I hope it might help. One thing it shows for certain is that the AC line is definitely not a steady frequency, but it varies over time. It also shows that the frequency seems to flutter a lot more abruptly during peak ...


11

One reason to divide a clock by two is to obtain an even 50% duty cycle square wave. It may be that the 8085 internally uses both clock edges, and wouldn't function if one half of the cycle happened to be much shorter than the other. In the days when the 8085 was new, those nice canned oscillators weren't common, and people often cobbled together clock ...


10

Here's what wikipedia says: Regulation of power system frequency for timekeeping accuracy was not commonplace until after 1926 and the invention of the electric clock driven by a synchronous motor. Network operators will regulate the daily average frequency so that clocks stay within a few seconds of correct time. In practice the nominal ...


10

If you want to implement a circuit like what you describe using off-the-shelf chips, I would estimate that it would take three decade counter chips (two of which will be used for divide-by-five, and one for divide-by-four), two 74HC595 chips (shift register with latch), one 74HC374 (8-bit latch), a segment driver chip, some transistors and resistors to drive ...


9

Depends on the flip-flop used in the shift register. Effectively, negate the enable line or assert the disable line :-), but you know that. I'd ask, "Why not gate clocks, provided that you gate them 'properly'?" A hazard is that if you asynchronously gate a clock you may (~= 50% chance for a symmetric clock) produce an additional clock transition at ...


9

The main reason is that a 1 Hz crystal would have to be physically very big. A crystal is a piece of quartz that mechanically vibrates at the specific frequency. Since quarts exhibits a fairly strong piezo-electric effect, those vibrations also cause electrical signals and vice versa. Getting a physically small crystal down to 33 kHz resonant frequency ...


8

Hennessy and Patterson give this rule of thumb for CMOS: \$ \text{Power} = \text{Capacitive load} \cdot \text{voltage}^2 \cdot \text{Frequency switched} \$ Calculating the power used in a system a priori is hard. The best approach is probably to try using an unoptimised MP3 decoder and characterising the performance. After that, you'll know how much ...


8

There are so many things in this question that it is difficult to know where to start. I am assuming that your FPGA logic is a SPI slave, not a master. If it is a master then you have a whole different set of issues which I'm going to avoid going into right now. The simple direct answer to your question is that you need to sample an async signal at least ...


8

The normal method for using PLL to multiply frequency is analogous to the normal method of using an op-amp to multiply the voltage of a high-impedance signal: the non-inverting input is fed the input signal directly; the inverting input is fed a scaled-down version of the output. The op amp will vary its output voltage as necessary to make the two inputs ...


8

Grid frequency will change throughout the day due to imbalance between electricity generation and consumption. Grid operator is obligated to keep the frequency within +/- 0.5Hz of 50Hz (frequency and range depends on the country's grid codes). When you measure time based on the assumption that every period is equal to 20ms you will have a time deviation ...


8

The core clock of the CPU isn't received directly from the motherboard. That clock is usually much slower (often by a factor of 10 or more) than the internal frequency of the CPU. Instead, the clock signal from the motherboard is used as the reference frequency for a higher frequency phase locked loop controlled oscillator inside the CPU. The generated clock ...


7

Most modern microcontroller designs will work with any pattern on their clock input, provided only that no high pulse is below a certain minimum length, no low pulse is below a certain minimum length, and no low-high-low or high-low-high pulse pair is below a certain length. Essentially what happens is that after the chip does all of the actions associated ...


7

I hate to give the answer of "look at the datasheet", but it is going to be your best option. All micro-controllers I have used give their estimated current draw running at various frequencies and voltages. Not all of them will give a graph or equation, but instead will give you a few points in a table. You will just have to interpolate to get what you need. ...


7

Manufacturers specify a maximum clock speed for a reason, as it guarantees correct operation under all conditions specified in the data sheet. Operating a device outside its specification might be OK in a hobbyist application, where an occasional failure can be tolerated, but isn't a good idea if reliability is important. You will have to test the system and ...


7

For independent accurate clocks, you can try GPS receivers or the long wave time receivers such as for WWVB. Another option is to put reasonable crystal oscillators on each unit and sync them up as part of the data upload process. The system receiving the data knows the current absolute time and extrapolates backwards using the data logger's current time ...


7

I don't know what you mean when you say "Clock rates of computers are too high". Too high for what? They're high, yes, often as high as technology will allow (GHz), often as low as the application allows, for instance a 32kHz watch crystal, if only little processing power is required, or power has to be limited (power consumption is a direct function of ...


7

"Time is what keeps things from happening all at once." - John Wheeler (1911-2008) You don't want to run things unorganized. Everything in a microcontroller happens consecutively, in discrete steps. Getting a byte from RAM to a register: put address on address bus. Tick. Assert RD line. Tick. Latch data from databus into register. Tick. If you would ...


7

From the ATtiny85 Datasheet: The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins, is defined by the combination of the Waveform Generation mode (WGM0[2:0]) and Compare Output mode (COM0x[1:0]) bits. The Compare Output mode bits do not affect the counting sequence, while the Waveform Generation mode bits do. ...


7

It's not going to hurt you to do all the things that jbarlow and David suggest, but let me try to make things a little bit easier for you (or maybe harder, because I'm going to say you can probably get away with a lot of things, but I'm not going to promise). A classic rule of thumb is that you can consider a circuit to be a lumped circuit if none of it ...


7

Termination resistors sit at one of two places: As close to the driver as possible (for source termination), or as close to the end of the trace as possible (for the kind of termination that you have). Notice that I said "as close to the end of the trace as possible", and not "as close to the receiver as possible"? There is a difference! Most people ...


7

It'll be something like +/-0.5 Hz maximum, and during the day I noticed a clock drift by a minute or two, but the long term average error will be zero; the utilities presumably reference it to time standards. Observing the instantaneous frequency is one way to compare supply and demand. If the frequency drops, the utilities will bring more power on line to ...


6

The quartz crystal should be the least of your problems. You can find them in miniature dimensions (2mm diameter x 6mm length) at any distributor. You may have some trouble to find the LCD, though. Microcontrollers in small packages are readily available, but they usually don't have enough I/O pins to control the LCD + some buttons. In common watches you'll ...


6

A better crystal is one way to solve it, but it's going to cost. And even then you get maybe 10ppm, good (or bad) for 5 minutes after 1 year. Temperature compensated crystals are good to get a predictable stability, but they don't solve the tolerance problem; if you have a 20ppm deviation from nominal frequency, you're sure you'll always have this ...


6

Well the right answer is "you can overclock until it stops working" .... more seriously something like bumping an 80MHz clock to 81MHz is not a big deal (puts on chip designer hat) when we tape out a chip we don't have complete control over what happens at the fab - they might put a little too much dopant (or to little) in one step, or under etch a step so ...


6

The probe is connected directly at the pin of the oscillator. I soldered a small wire onto the ground pad and I connect the ground clip there. This is VERY near where I'm probing. No. No. NO! If you are using a long ground clip (and even connect it to a wire?), it does not matter how close the point is, you still add a huge amount of inductance. To be ...


6

Yes, you can, but it's not recommended. You will need to have the hardware synthesize at twice the clock rate now - a 100MHz bus needs to be set up at 200MHz because the data only has half the time to propagate. You have effectively made it DDR. It seems that you are actually misunderstanding how a process works. All outputs within a process are scheduled ...



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