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1

Well looks like I solved it on my own. I used progressively increasing sized (W/L ratio) inverters of even numbers which acted as a buffer in between the VCO and divider. The full swing at the last stage was achieved because of the higher W/L ratio of the inverter at the last stage.


0

A MOSFET acts like a variable resistor in the linear region and a VCCS in the saturation region. In saturation, the VCCS has a small-signal output resistance due to channel length modulation, but it's not the same behavior as the linear region. In saturation, the drain current is given by the equation: $$I_D = k(V_{GS} - V_{T})^2(1 + \lambda V_{DS})$$ We ...


1

I'm pretty sure they are the same as it's a voltage controlled current source, but I've never seen that exact description. A current constraining source would be a resistor. Usually, as MOSFET as a resistor is an ohmic device, so I pushed through the math as if the device was exclusively a saturated MOSFET resistor (ie: mobility controlled device) and you ...


0

Figure 1. Extract from the PGA2505 datasheet showing the likely limitation for this application. The electrical characteristics don't seem to give a maximum source or sink current but does quote (1) output voltage at a measy 200 µA when high and (2) sinking 3.2 mA when low. I wouldn't push the chip beyond that. You're going to have to buffer the output. ...


3

If you don't want to use something simple like a DIPswitch, you could use a parallel EEPROM, some of which are available even today. Eg. AT28C64. Just ignore the 99.98% of the memory you won't be using.


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As Eugene Sh. said, TTL/CMOS problem is about logic level. If fact the two different technologies use different voltage level to send logic high signal (1) or low signal (0). Here an image (from allaboutcircuits.com) that can explain this concept: In the M48Z02 datasheet it is written: | Parameter | Min | Max | Unit | ...


1

The basic way to find \$R_i\$ is to find the bias point of the circuit, then apply: \$ R_i = dV/dI\$ Essentially, pretend that the voltage changes by just a little bit. How much does the current change? The change in voltage / the change in current will give you the input resistance. This is called small signal analysis. Using this technique you can ...


4

If you're looking to build up a computer out of discrete logic, and you're fixing to use breadboards, don't bother with FAST. Although you can easily get many of the 7400 series parts in FAST (search on 74F374, for instance), breadboards, at least solderless breadboards, will simply not support clock rates which make FAST necessary. The circuits get too ...


0

With few exceptions TTL chips never advanced over 8 bits so they are either 4 bit (ALU) either 8 bit (D-latches/buffers/registers). So my advice is to focus on the design than looking around for any exotics that couldn't fit your breadbord. Hope this helps. P.S. What 'High Frequencies' mean in your design?


2

I think you should ignore this circuit as it makes little sense. I have seen plenty of designs of AND gates from various IC manufacturers and none of them use this schematic. Why ? Because the PMOS and NMOS transistors are exchanged for some strange reason. This is what a proper AND gate looks like: Note how all PMOS fets are connected at the upper ...


3

Let us analyze your circuit. When both inputs are low, the PMOS are on, the NMOS are off, the out is tied low by the PMOS. When both inputs are high, the NMOS are on, the PMOS are off, the out is tied high by the NMOS. When one input is high and one is low, e.g. A=1, B=0, the rightmost PMOS is on, while the leftmost is off, the top NMOS is on but the ...



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