# Tag Info

## New answers tagged cmos

0

Accepted answer to the question How are logic gates created electronically? can clarify most of your doubts. So I recommend you tor read that answer before reading this. The basic steps involved in CMOS implementation are explained below taking NAND gate as an example. Hope that you can implement your logic following these steps. Step 1: Write the ...

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The base CMOS logic elements you have are NOT gates, NAND gates and NOR gates. So you need to convert your function to use only those gates. You have an OR gate in your function, so you need to convert this into one of the above three gates. There are two ways of doing this which stand out: (1) What do you need to do to use a NOR gate? The answer to that is ...

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This isn't perfect, but it gives me an almost 0.3v and VCC output from a 0v and 3.3v input.

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From what I remember of this logic manipulation there an interim step not being shown that may help. This is transforming ~(B+C). Doing the double ~ transform can convert it to (~B~C). So you can combine the equation's right side as ~B~CD. (You already have that part implemented on the upper right of the schematic). So the equation can be rewritten: F = ...

2

Yes, your solution is very nearly correct. Here are the steps, which you really should have shown in your question: In order to deal with the second top-level term, you need to apply De Morgan's Law, which states: $$\overline{A \cdot B} = \overline{A} + \overline{B}$$ and $$\overline{A + B} = \overline{A} \cdot \overline{B}$$ Using this, you can make ...

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The CD4538 (now CD14538) or the CD4047? Here's a digikey link with some serious filters. Or maybe a Cmos 555?

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I know that NMOS transistors are generally faster than PMOS transistors since electrons have a higher mobility than holes. Therefore NMOS would be preferred over PMOS for applications requiring higher switching frequencies. However, PMOS transistors have less flicker noise than NMOS because of their smaller transconductance, which means that PMOS conduct ...

4

The waveform generated by your circuit is special, because unlike a plain square wave, it contains no 3rd harmonic at all, nor any multiples of the 3rd harmonic (9th, 15th, 21st, etc.). The waveform contains only the fundamental, and the 5th, 7th, 11th, etc. harmonics: This is a huge advantage for synthesizing sinewaves, since the filter only needs to ...

4

1) That kind of counter is called a Johnson counter, and your circuit is a digital to analog converter (DAC) where the outputs of the registers are totem poles which can switch between Vcc and GND. In order to determine the values of the resistors, first determine the resolution of the ADC, in degrees, by dividing the number of stages into 180°. ...

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Is the gate of M15 intended to be connected to the source of M9, which I believe is the ground rail? The half circuit concepts are only applicable to symmetric circuits. However, that connection makes the circuit non symmetric. It talso means v2 is connected to ground which doesn't make sense for an NMOS. If we ignore that connection, in common mode, the ...

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