# Tag Info

9

Everything is analog / analogue ! Digital is a simplification of analog, instead of that a voltage can have any value between 0 and 5 V, for example 1.23456789 V (Analog) we only consider 2 states: 0 V and call it "0" and 5 V and call that "1". That is regarding signals and you already knew this. You can do something similar with circuits and devices. In ...

8

A few obvious ones: They take up space in your instruction encoding. If you had 256 registers, for instance, you'd need to use 8 bits in an instruction just to specify a single register. This could increase the overall size of instructions, or limit the types of instructions that can be encoded; having fewer registers, generally speaking, makes your ...

7

The X, Y, and Z lines all seem to be connected to multiple NOT gates. Instead, you only really need three NOT gates, and derive three lines $\small \overline{\text{X}}$, $\small \overline{\text{Y}}$, and $\small \overline{\text{Z}}$ and route those as necessary to the inputs of the next level.

5

In computers, arithmetic operations are performed by a specific integrated circuit that is placed inside the microprocessor, and is called "Arithmetic Logic Unit". You can have a look at the Wikipedia article on ALU ( https://en.wikipedia.org/wiki/Arithmetic_logic_unit ). As an example it mentions the 74181 ALU, which is a very simple Arithmetic logic unit, ...

5

There are tons of reasons to do this. Waveforms are often not enough, especially if say you are doing some behaviour modelling, or you need to see the impact of your implementation,or there is just too much data ... One example might be you're designing a video processing circuit that needs to implement a specific output and you need to make sure your ...

5

Since this is obviously homework for a digital design class (or similar), there is a tradition on SE that we don't simply feed your the answer, but guide you towards it, so I'm not going to provide a counter or IC or anything, just some food for thought. For me, this implies some sort of counter, although I'm sure that you can implement the counter using ...

4

Sure. The chip you want is known as a decoder. Specifically, you are looking for a 2-to-4 decoder, or 1-of-4 decoder. A cursory glance at the 7400 series logic list suggests that a 74139 would work for you, it's actually a dual 2-to-4 decoder. Most decoders will have an enable input, from your truth table, it appears you don't need this, so you can simply ...

4

Some hints to point you in the right direction (since this is clearly coursework): Adding a 0 to the end of a binary number has the effect of multiplying it by 2. Adding a 1 multiplies it by 2, then adds 1. For a number x to be divisible by 5, x % 5 = 0 (where % is the modulus operator). Consider what (x * 2) % 5 and (x * 2 + 1) % 5 would look like for the ...

4

You use a digital voltmeter chip such as the Intersil ICL7107. Figure 1. Intersil 7106/7 voltmeter.

4

You just need to stack them like in the picture:

3

Your process experiences the following stages: An event is observed on clk. clk has a value of '1', so the execution proceeds through into your loops Your loop tries to assign various values to y. Only the last value assigned will be scheduled, this execution of a process with a sensitivty list happens in zero time. The process ends. You will not see the ...

3

yes, because XOR is associative It's also commutative

3

Divide and conquer What does each part do?

3

Sometimes I feel like just giving up. Then I think maybe I should just not and miraculously my state is inverted.

3

One way you could go about it is by using a logic level MOSFET. It is called logic level because you can fully turn it on (as in turn on a switch) with logic levels (~ 4.5 to 5V) at its gate. simulate this circuit – Schematic created using CircuitLab So what this does is the following: When there is 5 volts at the output of the NOT gate, that ...

2

This is easier than you think . . . simulate this circuit – Schematic created using CircuitLab You can drive it with close to 10 volts (p-p) without a 9 volt battery.

2

An input that is "pulled high" as you refer to it, or also commonly "pulled up" refers to a signal that is connected to a positive rail via a medium value resistor (generally a few 10s of kΩ). As such, its voltage level is defined by the positive rail, provided that no significant current flows through the pull up resistor. Inside the PIC or AVR, it looks ...

2

Analog temperature sensors are easier in general to attach to the end of wires to make a temperature probe. On the other hand digital temperature sensors are in IC packages that are generally designed to be placed on a circuit board. This means that the probe type of sensor till typically have less thermal mass and be easier to couple to the medium being ...

2

I had to do it in a test bench of a small processor. Basically, I was providing a file containing the instructions, the verilog/vhdl was reading the file and executing the instructions. Then there was a special processor instruction, used at strategic locations, that dumped the current registers values in an output file. When the execution was over, I was ...

2

The thing you seem to be missing is edge triggered flip-flops. These are used at various points between combinatorial logic. They essentially sample the output of the logic at a clock edge, then freeze that value until the next clock edge. Meanwhile, the combinatorial logic is free to produce garbage intermeiate values, as long as it settles to the next ...

2

You are failing to see the error in your belief. If the pulse is high (as normal) and then goes low (as normal) and while low it is "interrupted", the signal will still be low and you won't have known the signal was interrupted until you realize that it has failed to go back high some time later. It's like when your phone rings - it does so in bursts - ...

2

One approach is a parellel in parallel out shift register. The data is loaded into the shift register, then shifted left or right by the desired number of places. The down-side of this is that it can only shift by one bit per clock cycle. An alternative is a barrel shifter which can shift by an arbitrary number of places in one go. It's worth realising ...

2

I'm having trouble seeing the pins on your parts, but I believe I see a 'clear' or 'reset' input. If you place an RC circuit that goes into a Schmitt trigger and run the Schmitt trigger into your clear outputs, then at power up, the resets will all be held until the RC charges, typically a few milliseconds. Looks like fun! Edited to add a schematic using ...

2

7400 series ICs take a bit of getting used to, as they are not as straightforward as, for instance, 74HC00 types. Here are circuits to use with, for instance, the 7404 and 7400. You'll note that the input switches provide a LOW input when closed, and the output LEDs are ON when the output is LOW. If this gives you too much trouble mentally, use unused ...

2

You've got the logic right, just need to work out the details. This should do the job: I have used NAND gates so I can use one as the inverter for the Engine Off condition. The CD4023 has three 3-input NAND gates, and will work with voltages up to 15V. The piezo has an internal driver, and is spec'ed for operation from 3 to 28VDC. It would be a very ...

2

The issue was the equipment I was using. The wires I had bought were faulty.

2

Yes. Here is a representation of a 7485 4-bit magnitude comparator: They can be cascaded to create as large of a comparator as necessary:

2

Load cell creep is a problem, and generally is most pronounced early in the life of the cell as the adhesive or weld binding the element to the material under strain relaxes or moves. This will vary depending on the bonding technique and the temperature cycling that the load cell experiences. It is most prominent in the offset; the gain generally remains ...

2

From 555 datasheet (TI) During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10 μs before the end of the timing interval. However the circuit can be reset during this time by the application of a negative pulse to the reset terminal ...

2

I think you are overthinking this. You probably know that $\mathsf{and}(x,y) = \mathsf{not}(\mathsf{nand}(x,y))$, and negation can be implemented using $\mathsf{not}(x) = \mathsf{nand}(x,x)$ or $\mathsf{not}(x) = \mathsf{nand}(x, \mathbf{1})$. Here, $$r = \mathsf{and}_3(x,y,z) = \mathsf{and}(\mathsf{and}(x,y), z),$$ and you can do no better than ...

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