# Tag Info

11

Actually your first guess is not as afar off as some are claiming. A CPU is built around something called an "Arithmetic Logic Unit" (ALU) and a simplistic implementation of that is to have the logic gates implementing all basic operations wired up to the inputs in parallel. All of the possible elementary computations are thus performed in parallel, with ...

9

Can An Operational Amplifier Circuit Be Made Entirely Out Of Diode Nand And Nor Gates? This apparently simple-enough question is somewhat ambiguous and can be answered several ways. Spehro has assumed that you convert the input to a digital value and perform digital arithmetic on it. So he says the answer is yes. ScottMcP takes your question at face ...

8

What that snippet seems to be talking about is restricting the propagation of noise generated inside the microcontroller (or other similar clock-based chip) into external circuitry. To that end the recommendation in that document is not just to add a series resistor, but to form a low pass filter close to the chip using a series resistor and parallel ...

7

Pretty far off. A CPU is made up of real gates (not programmable LUTs). The key operations on data are done in a block of logic often known as an ALU (arithmetic-logic unit). Inside this block is a set of gates that can, for example, AND two operands together, bit-by-bit. There's another set of gates that can add them together, and so on. When you execute ...

6

Nice to see a proper testbench and code that actually matches the question for a change... There are two easy ways for a signal to be corrupted: drive it from several signal sources don't drive it from any Now A11 remains 'U' throughout, suggesting it has no driver. While A1 alternates between valid and 'X' invalid values, suggesting it has more than ...

6

Trying to define what is the "most important" element of a circuit is pointless. As for what a logic gate is, it's a circuit that operates on signals with discrete states. Overwhelmingly, this is done using two states only, high and low. There are good electrical reasons for why two states is much easier to deal with and operate on than multiple states in ...

4

Every transistor has a current gain, usually $\beta$ or $h_{fe}$ in the datasheet. Typical values are on the order of 100. When the transistor is not saturated, then the base current and collector current are related by this factor: $$I_c = h_{fe} I_b$$ When the base current increases to the point where collector current can increase no more, the ...

4

The heart of the operational amplifier is the difference amplifier, where a current is divided between a pair of highly matched input transistors. This is what allows high gain combined with low offsets. Logic gates simply don't have the geometry to do this. So the answer is no. That said, logic inverters (and by extension almost any inverting gate such ...

3

First, the inversion of the outputs simply means that the output is active low. That is, for an input of 0000, the 0 output is selected, and it is driven low. All the other ouputs stay high. The NAND gates are used because, given that the active lines on the 74154 are low, DeMorgan's Theorem allows NAND gates to function as OR gates. That is, if the 74154 ...

3

I won't give you the finished design, because we don't usually do that here, but I'll give you a few ideas for further research. If I was to design such circuit, it would have three main components: a microcontroller the keypad a LED matrix Microcontroller There may be ways to make what you want without a microcontroller (with LEDs and signal diodes, ...

3

Retro-computing projects like this are big fun, but also a lot of work. For a start, you must ask yourself a few questions: how faithful do you want to restrict yourself to old technology? You say you want to build a CPU, that is a much more modest goal than building a computer! It is also much more interesting to design and build a CPU than a 10 x 10 x 10 ...

3

With some thought you can do it with less logic ... a single 2-input gate. I'll not give the whole game away, but one technique that may help is to treat each output bit individually, and minimise the logic for that output alone. Start with bit c as it is the simplest. Then put the individual solutions together.

3

To implement an N input AND gate you require N-1 two-input AND gates. The simplest topology is:

3

As Nick states, it is a transmission gate. Think of a TG as a switch that can connect or disconnect the horizontal line. As Ignacio states, in this particular case the TG is used to disconnect the external pin from the digital input synchronizer when the chip is in SLEEP mode. Note that at the same time that input is grounded by activating the FET. ...

3

Frankly, SPI interfaces are better suited for isolation than I2C. You can set the master clock to a frequency where the timing works out reliably. I2C is a bidirectional bus which makes isolation a pain. If you insist on using isolated I2C, AN-913 from Analog Devices is an application note that illustrates how:

3

A few arguments: with HC and HCT, the fan-out (at lower frequencies) is essentially unlimited, for LS it s IIRC 10 (or was it 20)? the HC and HCT families are newer than LS, so my bet would be that they will be around longer than LS HC and HCT use much less current than LS (except maybe for a few gates that switch at a very high frequency), which eases the ...

3

One of the simplest op-amps looks like this: simulate this circuit – Schematic created using CircuitLab And you can build it using NAND gates: simulate this circuit simulate this circuit So the answer is YES. Keep in mind that this will be crap, and will operate only over avery narrow range. The primary tool for operation that ...

2

To answer the question in general, from this point you would look at each output variable and construct the appropriate logic on that line. Each of your output variables, in general, will be constructed independent of the others. However, there are often cases where there is similarity (or they are identical) and as such may be formed used into a single ...

2

That is almost certainly an RS485 signal. It's a very robust differential protocol used a lot in industrial settings. RS485 is just a signalling standard, there is no protocol. Typically standard UART protocols are used. Because of this a standard PC RS232 connection, through an RS232 to RS485 level converter is all that's needed to connect to the device. ...

2

Such memory does exist, it is called Dual Port RAM (DPRAM).

2

That's a lotta transistors. I don't see any reason 2n2222 wouldn't work. I'd personally go for packages of transistors so that you can save space while still having full control. You would also use less current/power in general by going with packages of transistors since they usually have lower current carrying capabilities. I'm also curious as to why you ...

2

inverting A'B + A'CD + C won't result in AB' + AC'D' + C'. Because $\overline{(A+B)} = \overline{A}\ \overline{B} \ne \overline{A} + \overline{B}$. See De Morgan's Laws for details. Now coming to your circuit, the inputs for 3rd AND (inst5) gate are $D$, $\overline{D}$ and B hence the output of 3rd AND gate is $D\overline{D}B = 0$. So the output ...

2

Transistors are the foundation blocks of computers and embedded systems. TTL is used to refer usually to an electronic circuit that uses transistors for both the logic function (whether to be on or off) and the amplifying function (usable currents and voltages), or more colloquially to binary voltage levels of 0V-5V (because this range is what TTL dedicated ...

2

Part of this has already been answered on your previous question here. As for the diode, that is very important if you consider what happens when the capacitor is fully charged by the 4017 - if the relevant output of the 4017 goes low, it won't discharge the capacitor - the cap will discharge only at the rate caused by the 10k resistor. If the diode were a ...

2

Read your error report carefully: it complains about an output, 4.Q, tied to another "output", A:5. The simulator complains because you are likely to drive your input A with some values, but flip-flop four is also quite likely to drive that same exact node with its output. What if A wants to drive a 1 while Q.4 wants to drive a 0? That's not acceptable for a ...

2

Look at this bit: Step 3: (mo + m1 + m9 + m11) * (m9 + m11 + m13 + m15) Only two possible input conditions can cause this to evaluate true: m9 (WX'Y'Z) and m11 (WX'YZ). WX'Z

2

Many TTL parts and older memory chips have active low enable inputs, so the active low outputs of this part can be connected directly to those inputs. There are probably two enable inputs because otherwise there would be two unused pins on the 24 pin package (I don't recall seeing 22 pin DIP packages).

2

The active-low output is just how the design for that specific decoder was carried out - there is also active-high varieties. As for the NAND gates, there is a function being implemented in which the gates are there to realize it. For instance, f1, will be LOW (because all non-selected outputs are HIGH) unless the decoder selects output 2, 4, 10, 11, 12, ...

2

Positive feedback circuits (e.g. a Schmitt trigger) are in unstable equilibrium, the same as a ping pong ball on top of an upside-down plastic cup. You only have to move the cup one way or the other a little bit and it wants to roll off. Assuming the cup has a large lip and the ball doesn't roll off the end, then you can make it go the other way by moving ...

2

Control systems: OPEN LOOP CLOSED LOOP (Feedback) 2.1 Positive feedback 2.2 Negative feedback FEEDFORWARD

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