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16

If you feed something to a UART port of a microprocessor you must follow the UART communication protocol if you want the microprocessor to understand what you are feeding it. You need to embed each ASCI character into a UART package that contains a start bit, a stop bit and possibly a parity bit, a lot more information is available on the UART Wikipedia ...

6

There are a lot of techniques for this. You may want to look at Manchester coding or NRZ codes. Or 8b/10b coding, which maps every 8 data bits to a 10-bit sequence that allows for clock recovery, error correction, and special "comma" symbols that can be used to detect the start and end of a transmission.

5

Your measurement is not correct. The duty cycle is measured at 50% ($\frac{1}{2}V_{dd}$). So measure again at 1.65 Volt, if $V_{dd}$ is 3.3V. The 'real' high and low times: - above 90% of $V_{dd}$ is high - below 10 % of $V_{dd}$ is low does not matter. If a circuit has special requirements for the clock or data signal, it defines rising and ...

5

All ASCII characters are 8bit wide, you can see that in an ASCII table. HEX values of ASCII characters does not go beyond FF (1111 1111) UART cannot receive more than one data byte (8bits) at a time, also beside that 8bit data there are STOP and START bits, PARITY and a few more, which you can see at picture shown below and which together form UART ...

3

I think this may be what you are looking for. There are many ways to "count" using digital electronics: shift registers, barrel/cascade shifters, etc., and many more components and methodologies to achieve "counting." For shift register counters in particular, there are two types, Ring and Johnson. "Serial" simply means "one, two, three..." etc. Counting ...

2

You should be using a 32x4 bit memory. Why that size? Four bits (one nibble) wide because that is enough to store one digit. 32 nibbles because you want to store two 16-digit messages. It's not clear whether you are actually trying to build this circuit or just design it. If the former, you're not going to find any 4-bit wide EPROMs. So you need 32x8 ...

2

From what I know, photodiodes work "backwards". That is, they create a current flow from the cathode to the anode, so in your schematic $PD$ is likely the other way around. This way, there's no light detection going on, I guess current will flow through the circuit at all times. simulate this circuit – Schematic created using CircuitLab The ...

2

The 74x163 is a 4-bit synchronous counter. I notice it has a clear input, so you can detect the count being 5 (you'll be counting 0-5 instead of 1-6) and assert clear. Check the timing diagram carefully to make sure that doesn't cause a race condition. It may be OK since the term "synchronous" implies things only happen on the edge of clock, but you want ...

2

I believe what you are looking for are Morton numbers of x with x. Various ways for computing Morton numbers: Bit Twiddling hacks Specializing the binary magic numbers method for 8-bit input and 16 bit output (C-style code): uint16_t x; // set lower 8 bits of x for input x = (x | (x << 4)) & 0x0f0f; x = (x | (x << 2)) & 0x3333; x = (x ...

2

I don't think that would be a problem - just make sure the 3V part's $V_{OH}$ is higher than the 3.3V part's $V_{IH}$ and the 3.3V part's $V_{OL}$ is lower than the 3V part's $V_{IL}$, and if you are really paranoid add a resistor on the line.

2

With 4 different combination of S1 and S2 (1bit selectors), you select one of the four inputs and get that selected input on the output. So 4 tells you that you can get four different values at the output, and 1 tells you that you can have just one at a time on the output. I hope its now clearer whats happening here. Your picture is 4:1 multiplexor, and if ...

1

In Wikipedia (https://en.wikipedia.org/wiki/Multiplexer) 4:1 refers to four_inputs-one_output. Calling four_input-two_controls a 4:2 mux is weird because you always need log2(n) control signals to choose one of n, so this information is superfluous. In contrast to that it is very interesting to know to how many signals the input gets reduced (a 4:1 mux is ...

1

As was mentioned in the comments, what you stated is actually opposite of what the outcome actually is. When you have an input of 5V, the LED is off, which means no photons to turn on the phototransistor, so the transistor is off. If the transistor is off, then your your output is 3.3V When you apply 0V to your input, you have current flow through the LED, ...

1

You usually don't need to deal with assembly commands directly- there will be compiler- and device-specific macros predefined to access hardware registers such as PORT and TRIS (on a PIC), but ignoring the hardware datasheet entirely is a recipe for trouble. For example, you will quickly discover that pins have multiple functions and the default may not be ...

1

The 74HC163 with its sychronous clear input should be perfect for this application. Make sure you have a bypass capacitor (100nF - 1uF ceramic) directly across the power supply pins of the chip and make sure that every single unused input to the chip is tied to the appropriate logic level, either directly or through a resistor of a few K ohms. Using Q3 ...

1

As per your truth table it seems that the block you mentioned is SR flipflop not a latch. A latch is asynchronous, and the outputs can change as soon as the inputs do. And major difference between this flipflop and latch is latch - level triggered flipflop- Edge triggered. so, the given block is the SR flipflop which is negative edge triggered. ...

1

The input to the circuit has a race as the clock and the signal occur together. The input should have been set up on when clock is zero. Note how the input to the following latches are set up properly due to the fact the outputs of this type latch switch on clock going to zero.

1

why use a most-significant-digit-first adder I've been told that 90% of the effort in video compression is in performing motion estimation and motion compensation, also called block matching. That requires scanning through the previous (and in some systems the next) keyframe, looking for a block of pixels that looks "the most similar" to the current block ...

1

It seems it isn't possible and that my testing approach was wrong. I was testing with maximum and minimum brightness ignoring that they actually represent the ON/OFF states and don't consume the PWM registers.

1

The SFH203, from looking at it's datasheet, has a λS max sensitivity range from 850-900nm, which is the near-infrared range. It is less sensitive (up to 10% of max) at the visible light frequencies. There is a sensitivity chart included. So if you are using a blue LED for light, this can explain all of the loss in sensitivity. Use an 875nm near-IR LED and it ...

1

Gracious reply from Stephen Morse (designer of the 8086)... Boy, you are really asking a question from my deep distant past. The answer obviously has to do with the way the addressing modes were micro-coded, and the person who wrote the microcode (Jim McKevitt) is no longer alive. So I don't know how you can get an authoritative answer. A ...

1

If you want a single chip solution you could buy a CPLD with enough IO pins and program it to work as a shift register. They aren't even expensive these days and for simple tasks like this you may even get away without learning a HDL language like verilog or vhdl. For breadboarding you would need some kind of DIY friendly breakout board, and if you do so ...

1

We go from the state STAR ---> LOAD if we give q1 = 1 and various q0 (blue). Then we create two separate tables for JK .... Follow the diagram :)

1

Your K-Map is correct. R = (X + X' + Y' + Z)(XY + X'Y'Z+YZ') R = (1 + Y' + Z)(XY + X'Y'Z+YZ') R = (1)(XY + X'Y'Z+YZ') R = XY + X'Y'Z+YZ' R = XYZ' + XYZ + X'Y'Z + XYZ' + X'YZ' R = XYZ + X'Y'Z + XYZ' + X'YZ' respective terms of last equation will be logic one in K-Map

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