# Tag Info

39

Here is how companies do it: Raise about US$10 million. Negotiate with ARM to get a license. This will probably cost at least US$1 million. Get the design files from ARM. It will likely be in some form of VHDL, Verilog, or an "encrypted" netlist. Design your own chip using a mix of your own logic (for the peripherals) and what ARM gave you. This ...

23

ARM has a University DesignStart Program. As a student, you can only access basic Cortex-M0 material. But if you are really interested, get your faculty involved and then you can have access to much more design material (Verilog FPGA code, Evaluation IP, Simulations, etc.)

18

There is the tool exactly for this, named nibbler. They sell it for \$10 in Radioshack. Specialized hole punch for specific shapes: For most advanced holes there is a special drill even

14

The 741 is an old piece of junk, primarily used to teach basic electronics for cheap. I seem to remember reading somewhere that if every 741 ever made were to be collected, there would be enough to give every person on earth 6 or 8 of them. Modern op amps fall into several categories. General Purpose - These op amps are not very fast, have bad non-ideal ...

13

You are doing fine. If you don't have an expensive punch, or even a nibbler, you can do a perfectly acceptable job with a drill and file. I have done many cutouts like this. The secret is patience. Start each dilled hole in an indentation made by a pin punch so that the drill bit does not wander, and don't try to drill right up to your line. One of the ...

12

It is a hoax, you can read more at Snopes and here. But to add a bit of info, the story became popular in 1998, so the scale they would be working in was at best 250 nano-meters, so the picture would have been taken with an electron scope. Here is the original picture: The image is a clever digital manipulation of an image that appears on the ...

10

Bipolar opamps like the 741 or the LM324 have different tradeoffs than FET opamps. For one thing, they were designed many years ago when FET IC technology less advanced relative to bipolar IC technology. It's unfair to call the 741 junk. It was something wonderful in its time. It's close derivative, the LM324 is still in volume production today, so ...

10

The only vibration (SAE J1455) SMT problems I've ever seen for common components are failures for large Al-electrolytics. The solution there is just to anchor them down with a gob of silicone. An 0805 resistor will not fall off from pure vibration unless there is a tremendous amount of board warping going on (then it may fracture), or unless you are going ...

9

Yes, you can power down specific sections of a chip. In general you don't see this in CPUs by shutting down sections of hardware like the excess FP blocks (like you suggested), mainly because this would lead to weird behavioral changes in the logic based on whether or not an instruction used the powered down blocks. Where you do see it is in two places: ...

8

As always, it's all about having the right tool for the job. Without tools it's impossible, and with better and better tools, it becomes easier and easier. You're not doing badly so far, but you seem to have drilled some of the holes quite far from the line. That didn't help. Option 1. Keep drilling, preferably with holes nearer the line. Use side cutters ...

7

Possibilities: That's an electron microgram rather than a microscope shot, and inherently not in colour; the orange fringes are computerised false colour or a production artefact. You're looking at a top layer protective conformal coating of some sort (thin layer of silicon dioxide?) Feature size is below the wavelength of visible light, so reflected ...

6

I have done artwork, professionally, in the copper layers. Often it is easier to "slip the artwork past the bosses" if it is done in copper, since does not stand out as much as white silkscreen on green boards. Sometimes I would do the artwork in "negative" on the power planes. To view the art you would have to hold the PCB up against the light, and allow ...

6

Shielding just the jack without the cable also being shielded is rather pointless. About the only purpose of a shielded ethernet jack would be if it mates up with the chassis in such a way to minimize the electrical hole thru the chassis for the ethernet cable to pass thru. If your connector shield is only connected to the board ground and not to anything ...

6

Most artwork - with the exception of homemade boards - is done on the silkscreen layer, not in the copper layer, so should have no electrical effect. Artwork on the copper layer could increase parasitic capacitance in neighbouring traces. Since it's rare for modern professionally produced boards to not have a separate silkscreen layer, I suspect the only ...

5

Depending on how perfectionist you are, this way it will take somewhere between a long time and a very long time. I would have my front panel made by a service like Front Panel Express. With hobbyist tools you can't get the same quality and accuracy. (I noticed your fixing hole is off center.) They can work with aluminium up to 10 mm thick, or acrylic or ...

5

Unless the application is in a very noisy environment shielding is not required, or really even recommended. Shielding may be needed in very noisy environments such as some industrial settings but it comes with its own set of problems. Special attention needs to be paid to ensure that the shield is properly grounded, preferably only on one end of the ...

3

Are you up against twisting forces at all? Or just vibration? SMD component has a bit less mass, so for a given amount of vibration it'll put less stress on it's joints. On the other hand, the through-hole component won't care nearly as much if the board is flexing because it's got wire leads that should let it move around a bit.

3

Books that I recommend: @book{Kahng2011, Address = {New York, {NY}}, Author = {Kahng, Andrew B. and Lienig, Jens and Markov, Igor L. and Hu, Jin}, Publisher = {Springer Science+Business Media, {B.V.}}, Title = {{VLSI} Physical Design: From Graph Partitioning to Timing Closure}, Year = {2011}} @book{Alpert2009, ...

3

Mike is right: less mass is better, since the part will exert less force on the soldering when vibrating. So the SMT will be better, even when PTH has a larger soldering contact. (An 0402 resistor weighs only 1 milli-gram). When I was in college we learned that in very high-vibration environments they would use wire-wrapping instead of soldering. But ...

3

for design in previous role for defence and aerospace, we would subject our boards and enclosures to large amounts of shock and vibration in order to comply with the required standards. From a construction perspective, any boards with larger components (or where possible) would be fitted with anti vibration (AV) mounts of some sort. Generally we never had ...

3

A friend of mine who does control boards for windturbines (read: high-vibration, high-reliability) swears by SMD, specifically BGA, even QFP have too long pins and will suffer from fatigue too soon in that application. The shorter the pins, the stiffer the mount and the higher the reliability. You must protect the board from warping, though, because there ...

3

I agree that a jig saw is the best method if the panel allows the frame to swing, and I recommend the type in the picture, with an adjustable frame, rather than one that has to be squeezed to tension the blade -- I find that type very difficult to control. This one is easy as you can undo the wing nut and shorten the frame, loosen the clamp screws and ...

3

I would have went for: Starting by drilling holes just like you did, at the corners of the designated box. Using a jigsaw I would have cut the main lines of the box, careful not to pass the lines. Slightly less is fine - that's handled by the next step Using a (file tool, I would have completed the cut rectangle to fit the exact shape/size good luck and ...

2

In some device technologies, registers are connected to a bus using three-state outputs. Such an approach does have some advantages, but it generally either requires that either there be some "dead time" between the moment one register releases the bus and the moment another register starts driving it, or else runs the risk that a device might start driving ...

2

This will be a "Meta" answer referring to the other answers to correct some misconceptions. During VLSI manufacture different resolutions of lithography are used at the various levels and ONLY the most modern and most finest details are used at the the GATE definition level. Even steps previous to the Poly Silicon definition are done with older lithography ...

1

The term ASIC means "Application Specific IC" which originally meant an IC with a specific function. Now a days ASIC really refers to a design flow of a HDL, Synthesizable HDL to RTL, P&R etc. as described nicely by @Tim. So it should really be called"doing a design with an ASIC Flow" but confusingly people just say ASIC. An ASIC flow can be targeted ...

1

If you say you have a 'design ready on an FPGA', then I'll assume you have some verilog design which you have verified and tested on an FPGA. To get from here to an ASIC, you would go through the following (rough) steps: Front End Design The 'front end' of the design cycle generally includes writing of the RTL, and the synthesis of that RTL into a gate ...

1

My knowledge of this area of electronics is limited, but I'll try to give you some overview. Here's a pretty good video that provides an overview of the fabrication process. I think that will answer the fabrication part of your question When it comes to getting a design to fabrication, it really depends on the fabrication house, which technology is being ...

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