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6 Answers

votes activity newest

5	How to divide 50MHz down to 2Hz in VHDL on Xilinx FPGA
4	What is the difference between a voltage-level translator and a logic-level translator?
2	Multiplex Seven Segment Display Fast enough to make Solid
1	Cheap FPGA dev board
1	Need recommendation for a first hot air station

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341 Reputation

+5	Multisim and choosing a FPGA Board
+10	Cheap FPGA dev board
+66	How to divide 50MHz down to 2Hz in VHDL on Xilinx FPGA
-2	Writing a VHDL Module

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6 Questions

votes activity newest

3	Multisim and choosing a FPGA Board
2	Access Register/signal from Multiple Modules (Shared Memory)
2	Multiplex Seven Segment Display Fast enough to make Solid
2	Writing a VHDL Module
1	Implementing the Digilent EPP

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18 Tags

9 vhdl × 9	4 level-translation
4 fpga × 8	2 multiplexer × 2
4 logic-level	2 clock-speed × 2
4 digital-logic	1 c++ × 2
4 level-shifting	1 timing × 2

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