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125 reputation
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visits member for 1 year, 1 month
seen May 19 at 15:02
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125 reputation
 bio website visits member for 1 year, 1 month
6 badges
 location seen May 19 at 15:02
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16 Questions

votes activity newest
3
 Oscilloscope noise reduction when measuring IC voltage
3
 Oscilloscope acquisition frequency
2
 Oscillocope interleave mode and repetitive mode
2
 constraint error and illegal load problem in Virtex-2
1
 Static power of Xilinx FPGA
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125 Reputation

+13 Oscillocope interleave mode and repetitive mode
+18 Oscilloscope noise reduction when measuring IC voltage
+5 Static power of Xilinx FPGA
+10 RTL compiler timing constraint error
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2 Answers

votes activity newest
1
 RTL compiler timing constraint error
0
 Unit of area in RTL Compiler

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oscilloscope × 2
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modelsim × 4
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rs232
0
xilinx × 4
0
spice
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