Move your Gnd to V- as your 0V reference and ensure source is isolated(XFMR) otherwise it is offset from Vin 0V by Vf.
V and I then will be relative to the correct node then for load to Gnd.
My rules of thumb
$$\text{For <10%pp load ripple use } T=RC=5 to 10 \times \text{input cycle time}$$ I prefer 8x for higher voltages where Vf is negligible.
Thus $$C>=8/(1\text{kHz}*100R)=80 \mu F $$
for 5 Vp sine input 1kHz , R=100, C=80µF
Vdc = 5-2*0.8V you can expect, around 0.7 to 1V drop per Si diode depending on power rating, where ESR above 0.6V (Si)
$$\text{ESR(diode)[Ω] = k/Pd[W] for constant k=0.5~1 typ. tolerance on diodes.}\tag4$$
You should intuitively expect 10% Vpp out ripple , causes at least 1/10% (=10x) input current ripple compared to Iout.
RC values affect both load ripple V and input ripple I, also both affect diode peak voltage drop.
$$ V_{ dc(pk) }~~~= ~~V_{ dc(avg )} ~~~+~~ \frac{1}{2} V_{ o(pp)~}~~ \text{ ripple} ~~\tag5 $$ or...
$$ (V_{ dc(pk) }~-~V_{ dc(avg)}~~~~)~~*2~~=~V_{ o(pp) }~~ \text{ ripple} ~~\tag6$$
\$V_f=0.6V+ \dfrac{I_{ i(pk) }}{ k P_d}\tag6\$
In order to charge quickly and discharge slowly with low ripple voltage ripple current is very high (inverse related). If Vf reaches 1V at peak current, consider higher power rating diodes with lower Vf.
Now you can try using 80uF.
This guideline gets worse at lower voltages and low frequency as it implies huge caps.