1
\$\begingroup\$

I have a stupid Nubie question that I am hoping someone might be able to answer. I am wiring an ESP32 with a P-MOSFET for a high level switch to get the voltage of the battery that is powering the board. I have the following circuit.

enter image description here

I have both the 5V (6.6V max) and ground attached to the ESP32 from the solar battery, and it appears to be running fine. I have attached the GPIO pins from the ESP32 at 2 points, one to control the gate and the other to read the voltage from the divider. When I toggle the Gate GPIO Pin High and LOW, the P-MOSFET never turns on and off, it is always reporting the V3.5 on the analog GPIO like it is stuck grounded. Everything I have found on the web says this should work, but the IRF954 never closes the gate. I would really appreciate anyone's advice on this.

\$\endgroup\$
5
  • 1
    \$\begingroup\$ Welcome to EE.SE! Why the MOSFET? Can’t you have the divider connected all the time and go for higher resistance? \$\endgroup\$
    – winny
    Apr 30, 2021 at 20:53
  • 1
    \$\begingroup\$ You can't use a pMOS with such a low gate voltage like this. Take a look at this answer: electronics.stackexchange.com/a/551811/197351 \$\endgroup\$
    – Sim Son
    Apr 30, 2021 at 21:00
  • 1
    \$\begingroup\$ Why do you actually want to use the mosfet? The voltage divider will sink 33uA, which is negligible compared with the esp, even in deep sleep. \$\endgroup\$
    – Sim Son
    Apr 30, 2021 at 21:04
  • \$\begingroup\$ Thanks everyone. I was looking to use the PFet example on this page to reduce the consumption of voltage. fettricks.blogspot.com/search?q=reducing+voltage+divider+load \$\endgroup\$ May 3, 2021 at 11:51
  • 2
    \$\begingroup\$ Your gate cannot go above the VCC + Vf of the protection diodes. This leaves you with a VGS of about -2.6V with the 6.6V battery. The MOSFET will not turn off so you will always read 3.5. \$\endgroup\$
    – Gil
    May 14, 2021 at 2:42

2 Answers 2

5
\$\begingroup\$

The GPIO isn't driving the P-FET gate high enough to turn it fully off. The P-FET gate needs to be at least 6.6V-Vgs(threshold) or higher (that is, about 3.6V or higher) while the best you can achieve with 3.3V logic is only 3.3V. So the FET stays on.

If you add an N-FET level shifter you can get the desired function (simulate it here):

enter image description here

\$\endgroup\$
1
  • \$\begingroup\$ This is exactly what I was looking for! Thanks so much for taking the time to help out! Really appreciate it. \$\endgroup\$ May 3, 2021 at 11:49
2
\$\begingroup\$

To "turn off" a PMOS transistor you must bring its gate voltage up to its source voltage. The source voltage for your transistor is the battery voltage, 6.6 V. Since your GPIO pin will only provide 3.3 V it will not be able to turn the PMOS transistor off.

You would probably be better off using an NMOS transistor between R6 and ground.

\$\endgroup\$
4
  • 1
    \$\begingroup\$ Might be okay with 100kOhm in series. But in theory this exposes the gpio to 6.6V... \$\endgroup\$
    – Sim Son
    Apr 30, 2021 at 21:13
  • 1
    \$\begingroup\$ @SimSon I don't think a resistor in series would help. If you mean a pullup resistor, the GPIO input protection diodes would prevent that line from going much higher than about 4 V...still not high enough. And I wouldn't do that to my RPi. \$\endgroup\$ Apr 30, 2021 at 21:24
  • 1
    \$\begingroup\$ I'm sorry, I didn't make myself clear. What I was trying to say is that when the low-side switch is "open", the gpio is connected to those 6.6V through 100kOhm... \$\endgroup\$
    – Sim Son
    Apr 30, 2021 at 22:02
  • 1
    \$\begingroup\$ Maybe I'm too accademic :D 30uA probably won't be a big problem for the protection diodes and they'll barely affect the supply voltage... \$\endgroup\$
    – Sim Son
    Apr 30, 2021 at 22:04

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.