Timeline for Calculating a burden resistor for a current transformer
Current License: CC BY-SA 3.0
20 events
| when toggle format | what | by | license | comment | |
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| S Mar 11, 2017 at 13:17 | history | suggested | Peter Mortensen | CC BY-SA 3.0 |
Copy edited.
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| Mar 11, 2017 at 12:19 | review | Suggested edits | |||
| S Mar 11, 2017 at 13:17 | |||||
| S Aug 17, 2014 at 11:57 | history | bounty ended | CommunityBot | ||
| S Aug 17, 2014 at 11:57 | history | notice removed | CommunityBot | ||
| Aug 14, 2014 at 14:05 | comment | added | Nick | I feel like I saw this linked in another thread the other day: eetimes.com/document.asp?doc_id=1274134&page_number=1 | |
| Aug 14, 2014 at 13:53 | comment | added | Nick | @Connor - Since the reference design was for a power meter it is probably to detect tampering / theft. Otherwise, I don't really see the point either in a single phase system. | |
| Aug 9, 2014 at 11:34 | answer | added | akellyirl | timeline score: 1 | |
| Aug 9, 2014 at 11:06 | answer | added | Connor Wolf | timeline score: 2 | |
| Aug 9, 2014 at 11:03 | comment | added | Connor Wolf | That reference design is odd. It looks like I2 is intended to connect across a shunt-resistor, which means the value of R10 is irrelevant (it shouldn't even be placed, actually). I'm also not sure why it has current measurement interfaces in both sides of the line. Unless you're trying to detect ground-faults or something, it shouldn't be needed. | |
| Aug 9, 2014 at 10:20 | history | tweeted | twitter.com/#!/StackElectronix/status/498051214589063168 | ||
| S Aug 9, 2014 at 10:11 | history | bounty started | Angs | ||
| S Aug 9, 2014 at 10:11 | history | notice added | Angs | Draw attention | |
| Aug 8, 2014 at 8:24 | history | edited | Angs | CC BY-SA 3.0 |
added 76 characters in body
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| Aug 7, 2014 at 13:44 | comment | added | Andy aka | I was looking at the one on page 6 | |
| Aug 7, 2014 at 13:25 | comment | added | Angs | Do you mean the diagram on page 27 (sheet2/5)? | |
| Aug 7, 2014 at 13:22 | comment | added | Andy aka | Your diagram doesn't seem to match TI's | |
| Aug 7, 2014 at 13:01 | comment | added | Angs | Andy, could you please take a look at ti.com/lit/an/slaa517c/slaa517c.pdf page6 (3.2.2 is the explanation), Page 27 shows the implemented circuit, page 26 shows the I1/2 connections to the MCU (SD0P0, SD0N0) | |
| Aug 7, 2014 at 12:55 | comment | added | Andy aka | I'm not convinced that the circuit you show in the question is suitable for what you intend. Please explain more about the ADC you plan to use and why you require two channels for your CT. Without knowing your input voltage range, calculating a burden is pointless. | |
| Aug 7, 2014 at 10:41 | history | edited | Angs | CC BY-SA 3.0 |
added 177 characters in body
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| Aug 7, 2014 at 10:03 | history | asked | Angs | CC BY-SA 3.0 |