2 Added info on how to do a multi-bit-wide mux.
source | link

It's like this:

use ieee.numeric_std.all;
...
signal din :std_logic_vector (15 downto 0);  -- must be "downto 0"
signal sel :std_logic_vector (3 downto 0);
...
dout <= din(conv_integer(sel));

Hope that helps!

Addition: If you'd need a multiple bit wide mux then...

type data_bus_array is array(7 downto 0) of std_logic_vector (31 downto 0);
signal din :data_bus_array;
signal dout :std_logic_vector (31 downto 0);
signal sel :std_logic_vector (3 downto 0);
...
dout <= din(conv_integer(sel));

This is where VHDL gets a little bit wordy, since sometimes it's not "compact" to fill in that data bus array just to do a simple mux. But, there you have it...

It's like this:

use ieee.numeric_std.all;
...
signal din :std_logic_vector (15 downto 0);  -- must be "downto 0"
signal sel :std_logic_vector (3 downto 0);
...
dout <= din(conv_integer(sel));

Hope that helps!

It's like this:

use ieee.numeric_std.all;
...
signal din :std_logic_vector (15 downto 0);  -- must be "downto 0"
signal sel :std_logic_vector (3 downto 0);
...
dout <= din(conv_integer(sel));

Hope that helps!

Addition: If you'd need a multiple bit wide mux then...

type data_bus_array is array(7 downto 0) of std_logic_vector (31 downto 0);
signal din :data_bus_array;
signal dout :std_logic_vector (31 downto 0);
signal sel :std_logic_vector (3 downto 0);
...
dout <= din(conv_integer(sel));

This is where VHDL gets a little bit wordy, since sometimes it's not "compact" to fill in that data bus array just to do a simple mux. But, there you have it...

1
source | link

It's like this:

use ieee.numeric_std.all;
...
signal din :std_logic_vector (15 downto 0);  -- must be "downto 0"
signal sel :std_logic_vector (3 downto 0);
...
dout <= din(conv_integer(sel));

Hope that helps!