Timeline for Regulated Joule Thief: why it works?
Current License: CC BY-SA 3.0
15 events
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Mar 14, 2022 at 2:54 | comment | added | MicroservicesOnDDD | @OlinLathrop -- He wanted a more efficient implementation. | |
Apr 13, 2017 at 12:32 | history | edited | CommunityBot |
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Jan 30, 2015 at 18:53 | comment | added | Maxthon Chan | @OlinLathrop I am thinking about make the depletion FET pinch off the switching transistor's base current should the output voltage go too high. This also provides the same regulation but burn no energy. | |
Jan 30, 2015 at 18:46 | comment | added | Olin Lathrop | @Max: I don't get the point of using a JFET versus a NPN. | |
Jan 30, 2015 at 18:03 | vote | accept | Maxthon Chan | ||
Jan 30, 2015 at 17:36 | comment | added | Maxthon Chan | Can you have a look at the JFET-based controlling method? | |
Jan 30, 2015 at 17:23 | history | edited | Olin Lathrop | CC BY-SA 3.0 |
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Jan 30, 2015 at 17:16 | comment | added | Maxthon Chan | Would a P-channel JFET between R1 and base of Q1 work? The JFET pinch off (and shut down the oscillator without energy loss) when the output voltage go too high. | |
Jan 30, 2015 at 17:15 | history | edited | Olin Lathrop | CC BY-SA 3.0 |
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Jan 30, 2015 at 16:58 | comment | added | Russell McMahon♦ | - Ransistor across U1 can supply > 0.6V headroom if needed. | |
Jan 30, 2015 at 16:55 | comment | added | Russell McMahon♦ | A "nice" alternative is to place a transistor across U1 input-output so that when the regulator gets about 0.6V headroom the transistor turns on. this can be NPN with emitter at Vout and base at Vin (via a resistor or a PNP the other way round. You then use it to affect the oscillator in some way. I did this long ago and moved the oscillator mark-space ratio and got a very smooth linear control of regulator action. Olin long ago also noted having done similar - we both arrived at the iea independently. My osillator was a 74C14 Schmitt trigger inverter - allowing a low cost and effective SMPS | |
Jan 30, 2015 at 16:53 | comment | added | Olin Lathrop | @Ignac: There are various ways this could work. My first knee-jerk reaction is to put C-E between the B-E of Q1. When that second transistor turns on, Q1 is held off, which would kill the oscillations and therefore stop making high voltage. That would still waste some power thru R1, and you'd have to make sure oscillations start up again when this feedback transistor turns off. There are other ways too, like using a FET instead to open the connection to the battery. | |
Jan 30, 2015 at 16:51 | comment | added | Russell McMahon♦ | eg put an NPN with base "under" D2 so that when D2 conducts the transistor turns on. Emitter to ground and collector to base of Q1. When Vout is about 6V the converter base drive will be shunted. | |
Jan 30, 2015 at 16:49 | comment | added | Ignacio Vazquez-Abrams | Just out of curiosity, where would this transistor be placed? | |
Jan 30, 2015 at 16:32 | history | answered | Olin Lathrop | CC BY-SA 3.0 |