Timeline for 74LS163 Counter Exhibits Constant Voltage on an Input Pin
Current License: CC BY-SA 3.0
16 events
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| Apr 13, 2017 at 12:32 | history | edited | CommunityBot |
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| Mar 17, 2015 at 19:21 | comment | added | Ignacio Vazquez-Abrams | Only the TTL variants. The CMOS variants are MOSFET gates. | |
| Mar 17, 2015 at 19:20 | comment | added | sherrellbc | As a final question, are all input stages to 74 series logic of the type shown (being the emitter of an input transistor)? | |
| Mar 17, 2015 at 19:17 | vote | accept | sherrellbc | ||
| Mar 17, 2015 at 19:17 | comment | added | sherrellbc | I was just typing that out. I was thinking that the conducting path from the DMM would be too resistive, but that makes sense. Thank you. | |
| Mar 17, 2015 at 19:16 | comment | added | Ignacio Vazquez-Abrams | Measuring the voltage with a DMM will result in the diode conducting. It would be on the order of microamps, but that is enough. | |
| Mar 17, 2015 at 19:15 | comment | added | sherrellbc | Yes, but only if the diode is conducting. If the input is left floating then would it not remain as the same voltage of Q1 | |
| Mar 17, 2015 at 19:14 | comment | added | Ignacio Vazquez-Abrams | The base is 2.1V, and the 0.7V drop to the emitter makes it 1.4V. | |
| Mar 17, 2015 at 19:10 | comment | added | sherrellbc | Perfect! Nicely done. Although why would I be measuring 1.4V when the line is left floating? The base of Q1 would be 2.1V due to three junction drops if Q1 is not conducting from collector to emitter. It would seem then I would measure 2.1V unless there is a pull-down to ground integrated on the die. | |
| Mar 17, 2015 at 18:59 | comment | added | Ignacio Vazquez-Abrams | If you look at the circuit in the linked question, both Q2 and Q4 each have a 0.7V drop after the collector, since each present a B-E junction after Q1. Since Q4's emitter is grounded, the voltage at Q1's collector is 1.4V. And since both of Q1's junctions have the same drop, the voltage at the emitter must also be 1.4V. | |
| Mar 17, 2015 at 18:55 | comment | added | sherrellbc | .. I be measuring this 1.4V at the output terminal of this gate if the inputs are actually connected to the emitter (assuming similar topology for the counter) of the input transistor? | |
| Mar 17, 2015 at 18:55 | comment | added | sherrellbc | I do not follow. How do we know the voltage present at the collector of Q1 when the polarity of A or B are 00, 01, or 10? We have only one, or neither B-E junctions forward biased. You conclude therefore that we have a forward biased and conducting B-C junction; how is it that we know this? If this is the case, Q2 will be conducting some unknown current. Q2's emitter will be as some voltage and Q2's base will be at the same unknown voltage + ~0.7V. The base of Q1 will be higher than 1.4V in this case due to the unknown Q2 emitter voltage + Q2's B-E voltage + Q1's B-C voltage. And why would .. | |
| Mar 17, 2015 at 18:43 | comment | added | Ignacio Vazquez-Abrams | The voltage drop beyond the B-C junction is 1.4V, which is what you measured at the input. If the voltage drop is lower after the B-E junction then the B-C junction will not be forward biased. | |
| Mar 17, 2015 at 18:43 | comment | added | sherrellbc | Would it not be true also, however, that even when the base-emitter junctions are forward biased that current will flow through the base-collector junction? There is nothing setting the collector voltage (of Q1) to reverse bias it, at least as far as I can tell. That said, it seems like both junctions would be forward biased in this case and the device would be in active mode. | |
| Mar 17, 2015 at 18:43 | comment | added | sherrellbc | Ah, I see. So since the input is being driven LOW the junctions are forward biased and as such are conducting current to ground (or through 25k to ground in my case) and therefore is not allowing sufficiently low voltage to reset the circuit. Would this only be true for NPN input stages like was shown in your linked question? Also, is it frequent that only a junction of a transistor is used, as opposed to the entire device, as was also shown at the link? It seems like a clever idea really, to drive Q2 with the base-collector junction current when the base-emitter is reverse biased. | |
| Mar 17, 2015 at 18:07 | history | answered | Ignacio Vazquez-Abrams | CC BY-SA 3.0 |