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You can't physically probe the registers on a modern chip. I don't think this is possible even if you have the absurdly expensive clean room and scanning-tunneling microscope required for probing it with the lid off; they're likely to be under too many metal layers.

I don't think the hardware debugging capabilities are sufficient for this either. You might be able to get at the registers over JTAG: http://www.newelectronics.co.uk/electronics-news/jtag-based-embedded-debugger-is-first-for-intel-x86-platforms/32720/ but not in "real time", you'd have to single-step the execution.

There is the under-documented "System management mode", which is a hardware hypervisor, but again I don't think that has the right "trap" capabilities to trigger on modifications to specific registers.

I've found your other question at http://stackoverflow.com/questions/31104228/in-ia-32-assembly-language-can-idtr-gdtr-or-ldtr-be-modified-or-loaded-withohttps://stackoverflow.com/questions/31104228/in-ia-32-assembly-language-can-idtr-gdtr-or-ldtr-be-modified-or-loaded-witho , BTW.

The only way you could do this would be to build a "soft core" processor in an FPGA, which would be much slower than a real processor but faster than an emulation, and then you can monitor whatever changes you want.

You can't physically probe the registers on a modern chip. I don't think this is possible even if you have the absurdly expensive clean room and scanning-tunneling microscope required for probing it with the lid off; they're likely to be under too many metal layers.

I don't think the hardware debugging capabilities are sufficient for this either. You might be able to get at the registers over JTAG: http://www.newelectronics.co.uk/electronics-news/jtag-based-embedded-debugger-is-first-for-intel-x86-platforms/32720/ but not in "real time", you'd have to single-step the execution.

There is the under-documented "System management mode", which is a hardware hypervisor, but again I don't think that has the right "trap" capabilities to trigger on modifications to specific registers.

I've found your other question at http://stackoverflow.com/questions/31104228/in-ia-32-assembly-language-can-idtr-gdtr-or-ldtr-be-modified-or-loaded-witho , BTW.

The only way you could do this would be to build a "soft core" processor in an FPGA, which would be much slower than a real processor but faster than an emulation, and then you can monitor whatever changes you want.

You can't physically probe the registers on a modern chip. I don't think this is possible even if you have the absurdly expensive clean room and scanning-tunneling microscope required for probing it with the lid off; they're likely to be under too many metal layers.

I don't think the hardware debugging capabilities are sufficient for this either. You might be able to get at the registers over JTAG: http://www.newelectronics.co.uk/electronics-news/jtag-based-embedded-debugger-is-first-for-intel-x86-platforms/32720/ but not in "real time", you'd have to single-step the execution.

There is the under-documented "System management mode", which is a hardware hypervisor, but again I don't think that has the right "trap" capabilities to trigger on modifications to specific registers.

I've found your other question at https://stackoverflow.com/questions/31104228/in-ia-32-assembly-language-can-idtr-gdtr-or-ldtr-be-modified-or-loaded-witho , BTW.

The only way you could do this would be to build a "soft core" processor in an FPGA, which would be much slower than a real processor but faster than an emulation, and then you can monitor whatever changes you want.

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pjc50
pjc50
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You can't physically probe the registers on a modern chip. I don't think this is possible even if you have the absurdly expensive clean room and scanning-tunneling microscope required for probing it with the lid off; they're likely to be under too many metal layers.

I don't think the hardware debugging capabilities are sufficient for this either. You might be able to get at the registers over JTAG: http://www.newelectronics.co.uk/electronics-news/jtag-based-embedded-debugger-is-first-for-intel-x86-platforms/32720/ but not in "real time", you'd have to single-step the execution.

There is the under-documented "System management mode", which is a hardware hypervisor, but again I don't think that has the right "trap" capabilities to trigger on modifications to specific registers.

I've found your other question at http://stackoverflow.com/questions/31104228/in-ia-32-assembly-language-can-idtr-gdtr-or-ldtr-be-modified-or-loaded-witho , BTW.

The only way you could do this would be to build a "soft core" processor in an FPGA, which would be much slower than a real processor but faster than an emulation, and then you can monitor whatever changes you want.