Timeline for VGA controller using FIFO memory, discrete ICs and Arduino Uno/Mega?
Current License: CC BY-SA 3.0
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| Nov 18, 2015 at 11:36 | comment | added | Clonkex | Wow, just noticed the edit(s) (I thought I was scrolling much further down the page than before!). So much useful information! Thanks even more! I think with the two answers I have and the comments you've added I might be able to work out a plan! :D Geez, I want to select BOTH answers as correct! I don't even have enough rep on this SE site to upvote them :/ | |
| Nov 18, 2015 at 11:12 | comment | added | Clonkex | Oh, I can find 5 for $14 from China (would take at least 2 weeks, usually a month or more to arrive) or 10 for $28 ($14 + $14 postage) from the US (the much better option). I've actually already bought two more Arduino Unos but even if I don't use them in this project, I can be certain they won't go to waste! :P | |
| Nov 18, 2015 at 11:10 | comment | added | Clonkex | Sorry, I assumed my "background info" at the start of my question would be sufficient to imply my goals... I should have stated more specifically than make people guess, so my apologies. Anyway those are some excellent suggestions, and way more on-track than before! :D In terms of pin-count, the Uno has I think 14 useable outputs... wait, no, 20 if you count the analogue inputs, but the Mega has something like 54, so we're all good there. I didn't even know dual-port ram was a thing, so you've given me a lot to look into - thanks! :D | |
| Nov 18, 2015 at 8:36 | history | edited | alex.forencich | CC BY-SA 3.0 |
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| Nov 18, 2015 at 8:00 | comment | added | alex.forencich | On further consideration and after looking at the vgax code, I think a dual port RAM like the IDT 7005 or 7025 in combination with a 12 bit counter and possibly and 8 bit MUX would be the way to go, as it would remove just about all of the repetitive load off of the chip. The only downside is that it would require a LOT of pins, probably more than 24 pins, to properly interface with. | |
| Nov 18, 2015 at 7:55 | history | edited | alex.forencich | CC BY-SA 3.0 |
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| Nov 18, 2015 at 7:41 | history | edited | alex.forencich | CC BY-SA 3.0 |
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| Nov 18, 2015 at 7:22 | history | edited | alex.forencich | CC BY-SA 3.0 |
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| Nov 18, 2015 at 6:16 | history | edited | alex.forencich | CC BY-SA 3.0 |
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| Nov 18, 2015 at 6:06 | comment | added | alex.forencich | Well, why didn't you say so? In that case, I think a FIFO-based solution might be ideal. However, use more than 1 FIFO. You can write to the FIFOs serially at high speed (just send a write pulse to one of them) and then read from them in parallel and directly drive an R-2R DAC. Perhaps something like 3 of 74ALS232 or CD40105, 16 word x 4 bit async FIFOs. One for each color. The CD40105 seems to be available on Ebay AU for about 14 AUD for 10 of them with free shipping. You could write to them round-robin as fast as you can go, then use a PWM output to clock the output. | |
| Nov 18, 2015 at 6:02 | comment | added | Clonkex | Incidentally, I still don't know what "synthesizable" means with regards to FPGAs. Just something to bear in mind when talking to complete FPGA-noobs - they may end up more confused than when you began talking! :P | |
| Nov 18, 2015 at 5:49 | comment | added | Clonkex | "create a gigantic hack job of highly optimized code that is extremely limited in its capability" This is goal number 1, although it won't be a hack at all.... "On an FPGA, outputting 640x480 VGA is trivial" Exactly. That's not what I want. It would be about the same cost and be far, far easier for me to simply buy a Zero or Due than an FPGA, but I want it to be limited. I want the challenge of fitting a fun and playable game onto limited hardware, much like the days of the Mega Drive. I already make high-res games with interesting graphics on my PC. | |
| Nov 18, 2015 at 5:33 | comment | added | alex.forencich | Well, I think you have to consider what would be the better option: learn how to write Verilog or VHDL and how to use FPGAs and create a robust implementation in digital logic, or create a gigantic hack job of highly optimized code that is extremely limited in its capability. On an FPGA, outputting 640x480 VGA is trivial. And there would be a lot of logic to spare for implementing all sorts of other interesting graphics features. | |
| Nov 18, 2015 at 5:21 | comment | added | Clonkex | Huh, I actually had that page open (twice) from my previous googling, but hadn't read it yet. Good resource, thanks :) I've had another idea, though. Posted about it on the Arduino site where I also asked the above question: forum.arduino.cc/index.php?topic=360181.msg2483549#msg2483549 | |
| Nov 18, 2015 at 3:49 | comment | added | alex.forencich | Also, if you're new to FPGAs, the way to think about the 'code' is that you are describing a circuit with the code, not writing a program. If you think in terms of writing a program, you're going to end up with HDL that is either not synthesizable or horribly inefficient. | |
| Nov 18, 2015 at 3:27 | comment | added | alex.forencich | There is a good list of boards to choose from here; there is no appreciable difference in software support (i.e. all Xilinx boards will require Xilinx ISE for development): joelw.id.au/FPGA/CheapFPGADevelopmentBoards | |
| Nov 18, 2015 at 2:18 | comment | added | Clonkex | Well I guess I should try to wrap my head around FPGA programming then... argh, FPGAs sound awesome in theory but the code is so extremely foreign... Plus they're not at all cheap. A MojoV3, which, as far as I can tell, is a pretty small one, is $160!! :O | |
| Nov 18, 2015 at 1:03 | history | edited | alex.forencich | CC BY-SA 3.0 |
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| Nov 18, 2015 at 0:50 | history | answered | alex.forencich | CC BY-SA 3.0 |