Timeline for Writing synthesizable testbenches
Current License: CC BY-SA 3.0
8 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Dec 1, 2016 at 13:57 | history | tweeted | twitter.com/StackElectronix/status/804323612308054016 | ||
| Dec 1, 2016 at 11:13 | answer | added | Sean Houlihane | timeline score: 2 | |
| Dec 1, 2016 at 10:45 | answer | added | user110971 | timeline score: 1 | |
| Dec 1, 2016 at 3:10 | answer | added | user2913869 | timeline score: 1 | |
| May 15, 2016 at 5:23 | history | edited | J. Doe |
edited tags
|
|
| May 15, 2016 at 5:18 | comment | added | user105652 | Your right in being paranoid about the final results. When I built ATE equipment using LabView I could write extra code as 'fake' inputs for simulation, but found myself building emulation boards with tiny versions of the real parts, and much lower voltages. But this gave me the real-time feed back I needed to be certain the software and the hardware would behave ok, and where I had to insert trim-pots and DIP switch's to fine-trim or put the ATE into a built-in test mode. At some point the 'standards' run out, or become very expensive. | |
| May 15, 2016 at 5:07 | review | First posts | |||
| May 15, 2016 at 11:27 | |||||
| May 15, 2016 at 5:02 | history | asked | J. Doe | CC BY-SA 3.0 |