Timeline for SPI design traces for a PCB
Current License: CC BY-SA 3.0
11 events
| when toggle format | what | by | license | comment | |
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| Apr 9, 2019 at 13:50 | comment | added | Andy aka | @mohammadsdtmnd if you wanted to make outward transmissions to a slave fail, you could do so by totally screwing up the track lengths of data and clock. It would be hard to do (and pointless of course) but compared to the return slave response being faulty, this could happen despite clock and data track lengths being perfect. | |
| Apr 9, 2019 at 12:52 | comment | added | mohammadsdtmnd | I can't understand this sentence: "make out-bound transmissions fail by totally mismatching line lengths.". can you explain more? | |
| Aug 18, 2016 at 11:25 | history | edited | Andy aka | CC BY-SA 3.0 |
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| Aug 18, 2016 at 11:19 | comment | added | gbulmer | Maybe I should have much more confidence in my fellow-human and their calculators. Maybe give the result of the example calculation, with something like 'A delay of 5 ns ... 1 metre of 50 ohm cable, so 12.5ns is about 2.5 metres of cable, just to put it into context', and maybe even, 'and so that is not an issue for this sort of speed SPI across a PCB'? (It does feel a bit 'Darwin award-ish', i.e. anyone who can't be bothered to do the arithmetic ..., but it might generate needless comments without extra clarity, because I think SPI is pretty popular). However, I think it is good as it stands. | |
| Aug 18, 2016 at 11:10 | history | edited | Andy aka | CC BY-SA 3.0 |
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| Aug 18, 2016 at 11:03 | comment | added | Andy aka | @gbulmer OK hopefully made clearer! | |
| Aug 18, 2016 at 11:03 | comment | added | Andy aka | @ScottSeidman OK example added! | |
| Aug 18, 2016 at 11:02 | history | edited | Andy aka | CC BY-SA 3.0 |
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| Aug 18, 2016 at 10:45 | comment | added | Scott Seidman | You should put some numbers on this, lest someone think it is a real problem for the typical project, which it is not! | |
| Aug 18, 2016 at 10:41 | comment | added | gbulmer | Nice answer. Maybe break "That is two delays and if those two delays add upto the half the time period of the clock then it all fails." into two separate sentences; convert the 'and if' to '. If'? I had to read the whole sentence twice. Otherwise, lovely, especially the last sentence. | |
| Aug 18, 2016 at 10:33 | history | answered | Andy aka | CC BY-SA 3.0 |