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Oct 14, 2016 at 12:33 vote accept OnStrike
Oct 14, 2016 at 8:38 answer added pipe timeline score: 2
Oct 13, 2016 at 12:01 review Close votes
Oct 17, 2016 at 10:31
Oct 13, 2016 at 4:31 comment added OnStrike @Andyaka Edit made: Please note that I cannot revert back to the original, as it contains the original mismatch. This is the best I can do to correct my mistake. Regardless, the premise of the question is the same.
Oct 13, 2016 at 4:22 history edited OnStrike CC BY-SA 3.0
Made note of previous edit to correct mismatch between schematic and equations
Oct 13, 2016 at 4:10 comment added OnStrike @Andyaka I can acknowledge that in an edit - that said, please note the (unedited) KCL's clearly show how I arrived at the output voltage. You didnt address that mismatch. My sincere apology for any inconvenience but I hardly think it degrades the content of the post. In any case, your answer does not show how the gain is used to calculate the range of voltages within the non-saturated range.
Oct 13, 2016 at 3:42 comment added Andy aka One good way to piss anyone off is to edit a question that then undermines an answer already given. If you want decent help don't do this because as you can see @whatroughbeast is already on my case questioning my math. Please undo your sly correction and live with your error, after all it was my answer that pointed you to correct this. Rewind back to the original or make a substantial effort to make it clear that you have edited your circuit diagram. I might then consider lifting the down vote I gave you.
Oct 13, 2016 at 3:26 comment added WhatRoughBeast @Andyaka - "the gain is clearly 4 to 1." Huh? Looks like a non-inverting gain of 8 following an attenuation of 1/4, for a total gain of 2. Unless the current schematic has been edited from the original.
Oct 13, 2016 at 1:33 comment added OnStrike @BruceAbbott Thank you, Yes. I wasnt sure if it was an error in the diagram because Ive seen similar problems also without the '-' signs so I was confused. It appears my textbook is to blame..? Still, is the lower supply terminal always negative, or is it possible that the negative supply is positive?
Oct 13, 2016 at 1:17 comment added Bruce Abbott The supply pin marked '12 v' should be be -12V. Is this error in the circuit diagram the reason you are confused?
Oct 13, 2016 at 1:01 answer added Andy aka timeline score: 0
Oct 13, 2016 at 0:58 history edited OnStrike CC BY-SA 3.0
edited body
Oct 13, 2016 at 0:52 comment added Andy aka the gain is clearly 4 to 1.
Oct 13, 2016 at 0:15 comment added OnStrike @IgnacioVazquez-Abrams Thank you for your interest. The KCL equations (as written) are correct - no current enters either input terminal. I am strictly asking about saturation and the V+, V- supply voltages.
Oct 13, 2016 at 0:11 comment added Ignacio Vazquez-Abrams No current can be drawn from the op amp input; it must be drawn from the output through the feedback resistor.
Oct 13, 2016 at 0:09 history edited OnStrike CC BY-SA 3.0
Title and schematic revision
Oct 12, 2016 at 23:54 history asked OnStrike CC BY-SA 3.0