Timeline for Faster IO on ARM Cortex-M3 (Sam3x8e) than PIO_SODR and PIO_CODR?
Current License: CC BY-SA 3.0
3 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Dec 31, 2016 at 19:23 | comment | added | Sean Houlihane | Not sure how an ISR can beat a simple write (which is maybe 2 cycles if you're lucky). Writing alternate 1/0 is faster than read, invert, write by a good margin though. | |
| Dec 31, 2016 at 18:52 | review | Late answers | |||
| Dec 31, 2016 at 19:03 | |||||
| Dec 31, 2016 at 18:36 | history | answered | Fabian Fahrenholz | CC BY-SA 3.0 |