Timeline for How do I generate a .JED file for programming an ATF750C using VHDL language?
Current License: CC BY-SA 3.0
5 events
| when toggle format | what | by | license | comment | |
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| Mar 13, 2017 at 14:13 | history | edited | Bregalad | CC BY-SA 3.0 |
So I messed up. I wanted to ask about 750C devices, not regular 22V10 obviously.
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| Feb 21, 2017 at 7:44 | history | edited | Bregalad | CC BY-SA 3.0 |
added 257 characters in body
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| Feb 20, 2017 at 13:45 | history | edited | Bregalad | CC BY-SA 3.0 |
added 75 characters in body
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| Feb 20, 2017 at 10:16 | answer | added | Leon Heller | timeline score: -1 | |
| Feb 20, 2017 at 9:55 | history | asked | Bregalad | CC BY-SA 3.0 |