Timeline for Why would IO pins be tied to VCC or GND with 0 Ohm resistor on FPGA Dev Board?
Current License: CC BY-SA 3.0
10 events
| when toggle format | what | by | license | comment | |
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| Mar 16, 2017 at 11:41 | vote | accept | ks0ze | ||
| Mar 16, 2017 at 1:34 | comment | added | Krunal Desai | If you see IO pins directly strapped without 0 ohm resistors, those can also be used for board revision identification -- I've done that before with balls on the inside of the package that I could not break out. Using 2-3 of those lets me write FPGA images that can read the board's physical revision ID and act accordingly. Since the balls are strapped to nets in copper, it's unlikely that an end-user would go through the effort to spoof that revision. | |
| Mar 16, 2017 at 1:16 | answer | added | StainlessSteelRat | timeline score: 5 | |
| Mar 15, 2017 at 3:58 | comment | added | old_timer | sometimes could be used as straps. there could be software that if it sees a specific pin high then it chooses some path, low it chooses some other path, or one state of a pin could mean enable something or run at a higher clock rate, use a different uart to output stuff. Logic designs could just as easily use a pin or set of pins for if-then-else so one design can have different options without re-building or re-compiling, just change the strap. | |
| Mar 15, 2017 at 2:23 | comment | added | mic | Generally zero ohm links are used to avoid warnings/ errors generated by CAD tools for I/O signals directly connected to Power . | |
| Mar 15, 2017 at 1:33 | answer | added | catraeus | timeline score: 1 | |
| Mar 15, 2017 at 0:40 | comment | added | ks0ze | @uint128_t, yes, that's the board/schematic I'm working with. There doesn't appear to be a user manual and I'm not sure where the design originated (boards available on ebay/amazon/aliexpress/etc.) | |
| Mar 15, 2017 at 0:25 | comment | added | uint128_t | Nevermind, I'm guessing it's this one? | |
| Mar 15, 2017 at 0:24 | comment | added | uint128_t | Can you link the schematic (and ideally, the user manual)? There are multiple dev boards with that FPGA, IIRC. | |
| Mar 14, 2017 at 23:14 | history | asked | ks0ze | CC BY-SA 3.0 |