Timeline for Nanosecond interrupt accuracy on a 64MHz microprocessor
Current License: CC BY-SA 3.0
6 events
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| Jun 11, 2020 at 15:10 | history | edited | CommunityBot |
Commonmark migration
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| Apr 18, 2017 at 15:08 | comment | added | inushii | Thank you to you and everyone who recommended a TDC! It took some researching to find one with a short enough measurement range, but fortunately TI makes the TDC7201 which goes down to 0.25ns and is similar to what you suggested. I think I'll give this a go! | |
| Apr 18, 2017 at 15:05 | vote | accept | inushii | ||
| Apr 18, 2017 at 5:03 | comment | added | alex.forencich | I would personally try abusing an FPGA deserializer. It is possible to get relatively low end FPGAs that have serializers capable of >1Gbps, which should provide at least 1 ns resolution. It may be necessary to do some external calibration to get the absolute delay nailed down, though. | |
| Apr 17, 2017 at 21:28 | history | edited | Marcus Müller | CC BY-SA 3.0 |
added 139 characters in body
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| Apr 17, 2017 at 21:21 | history | answered | Marcus Müller | CC BY-SA 3.0 |