I have been designing a usb device using a psoc 4L with integrated USB full speed capability. Yet for nearly all of my designs as soon as I plug the usb into the computer I get the following problem.

From the research I've been able to dig into, this suggests that there is something wrong on my physical layer (I'm using a generic starter project provided by cypress, and occasionally I have had it correctly connect)

I've measured the D+ and D- lines and here are the pictures from my o-scope

My question is what appears to be the problem here?

My intuition suggests that D+(the blue trace) is taking too long (18 ns which is greater than 12 ns allowed) Therefore it has too much capacitive loading and I need to identify in the layout what could be adding to it. Is this correct intuition, or is something completely different going on?

EDIT *******

I redid the scope with measurements on. here it is. Looks like the voltage is consistently around 4.1V

I have been designing a usb device using a psoc 4L with integrated USB full speed capability. Yet for nearly all of my designs as soon as I plug the usb into the computer I get the following problem.

From the research I've been able to dig into, this suggests that there is something wrong on my physical layer (I'm using a generic starter project provided by cypress, and occasionally I have had it correctly connect)

I've measured the D+ and D- lines and here are the pictures from my o-scope

My question is what appears to be the problem here?

My intuition suggests that D+(the blue trace) is taking too long (18 ns which is greater than 12 ns allowed) Therefore it has too much capacitive loading and I need to identify in the layout what could be adding to it. Is this correct intuition, or is something completely different going on?

EDIT *******

I redid the scope with measurements on. here it is. Looks like the voltage is consistently around 4.1V 

EDIT # 2*******

I got it to work! I was originally powering the psoc 4 off of the miniprog. As soon as I switched to USB powered it worked. I'm talking with some cypress FAE's so as soon as I get an answer as to why that would be the problem, I'll post here

I have been designing a usb device using a psoc 4L with integrated USB full speed capability. Yet for nearly all of my designs as soon as I plug the usb into the computer I get the following problem.

From the research I've been able to dig into, this suggests that there is something wrong on my physical layer (I'm using a generic starter project provided by cypress, and occasionally I have had it correctly connect)

I've measured the D+ and D- lines and here are the pictures from my o-scope

My question is what appears to be the problem here?

My intuition suggests that D+(the blue trace) is taking too long (18 ns which is greater than 12 ns allowed) Therefore it has too much capacitive loading and I need to identify in the layout what could be adding to it. Is this correct intuition, or is something completely different going on?

I have been designing a usb device using a psoc 4L with integrated USB full speed capability. Yet for nearly all of my designs as soon as I plug the usb into the computer I get the following problem.

From the research I've been able to dig into, this suggests that there is something wrong on my physical layer (I'm using a generic starter project provided by cypress, and occasionally I have had it correctly connect)

I've measured the D+ and D- lines and here are the pictures from my o-scope

My question is what appears to be the problem here?

My intuition suggests that D+(the blue trace) is taking too long (18 ns which is greater than 12 ns allowed) Therefore it has too much capacitive loading and I need to identify in the layout what could be adding to it. Is this correct intuition, or is something completely different going on?

EDIT *******

I redid the scope with measurements on. here it is. Looks like the voltage is consistently around 4.1V