Timeline for Capacity Embedded in PCB for High-Sensitive Electrometer Legitimate?
Current License: CC BY-SA 3.0
8 events
| when toggle format | what | by | license | comment | |
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| Jul 10, 2017 at 18:59 | comment | added | m3x1m0m | I carried out investigations on the noise and I spend quite some time on calculations before designing my amplifier. This is however off-topic. I asked about embedded caps in the context of highly-sensitive electrometers and not about amplifier design approaches. | |
| Jul 1, 2017 at 13:22 | comment | added | D.A.S. | @m3x1m0m Realize that all signals are analog and have analog noise. Quantizing your signals with specs as I outlined is your challenge before starting any design. Until you fully understand this and anything that can go wrong from all sources, that is measurable, you will go thru many design iterations or hours of debug. Anticipating problems and defining them in specs, is the key before starting any good design. | |
| Jun 30, 2017 at 8:41 | comment | added | m3x1m0m | I hope I collected all the information needed to design such a system properly now. It is not a communication system so I do not really have a SNR. But I guess, that is OK? Basically everything above the noise floor (\$320 \, µ V\$ worst-case at the output) is visible. | |
| Jun 30, 2017 at 5:34 | comment | added | D.A.S. | @m3x1m0m by specs I mean what are your requirements for Signal Input, Output, SNR, Signal BW, Noise BW, dynamic range, and accuracy requirements for calibration, limitations on sensor size, etc. | |
| Jun 29, 2017 at 22:08 | comment | added | m3x1m0m | I edited the original post. | |
| Jun 29, 2017 at 13:54 | comment | added | D.A.S. | To improve s21 gain + phase response we need you to give a spec and schema model on your requirements. Then it will be obvious what to do with phase margin using the correct source capacitance and lead-lag compensation circuit. | |
| Jun 29, 2017 at 8:40 | comment | added | m3x1m0m | Thank you for your answer. I had another approach calculating the \$ f_{3dB}\$. $$f_{3dB} = \frac{1}{R_f C_f 2 \pi}$$ You can get this equation by using \$ P = U \cdot I^*\$. So this would result in approx. 160 Hz. It is nothing more than a parallel resonant circuit consisting of R and C. I can not just put C to 0 as I have a pole. So you can see in the LTSpice ac analysis, that it is escalating at some point. That is why I need a capacitance. A really small one. And my question is: Can I do this by putting an embedded capacitance in the feedback loop or will this have negative side eff.? | |
| Jun 28, 2017 at 17:58 | history | answered | D.A.S. | CC BY-SA 3.0 |