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Commonmark migration
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#define _P1TOVIF PSMC1INT,3 ;1= 16-bit PSMC1TMR overflowed 0xFFFF -> 0x0

define _P1TOVIF PSMC1INT,3 ;1= 16-bit PSMC1TMR overflowed 0xFFFF -> 0x0

Where is your code to check for overflow, as in a bit test of '_P1TOVIF PSMC1INT,3'? As I see it you can start and stop your counter, but what code do you have to catch the counter overflow? Is it an ISR? Does not need to be.

I looked at your code closely and could not find a bit test condition check. Obviously this 16 bit counter does not do more than stay at zero. There is no hardware to auto-reload the counter that I could see.

Unless we are missing something you need to poll for the overflow flag or have that flag trigger an ISR to reload the counter.

#define _P1TOVIF PSMC1INT,3 ;1= 16-bit PSMC1TMR overflowed 0xFFFF -> 0x0

Where is your code to check for overflow, as in a bit test of '_P1TOVIF PSMC1INT,3'? As I see it you can start and stop your counter, but what code do you have to catch the counter overflow? Is it an ISR? Does not need to be.

I looked at your code closely and could not find a bit test condition check. Obviously this 16 bit counter does not do more than stay at zero. There is no hardware to auto-reload the counter that I could see.

Unless we are missing something you need to poll for the overflow flag or have that flag trigger an ISR to reload the counter.

define _P1TOVIF PSMC1INT,3 ;1= 16-bit PSMC1TMR overflowed 0xFFFF -> 0x0

Where is your code to check for overflow, as in a bit test of '_P1TOVIF PSMC1INT,3'? As I see it you can start and stop your counter, but what code do you have to catch the counter overflow? Is it an ISR? Does not need to be.

I looked at your code closely and could not find a bit test condition check. Obviously this 16 bit counter does not do more than stay at zero. There is no hardware to auto-reload the counter that I could see.

Unless we are missing something you need to poll for the overflow flag or have that flag trigger an ISR to reload the counter.

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user105652
user105652

#define _P1TOVIF PSMC1INT,3 ;1= 16-bit PSMC1TMR overflowed 0xFFFF -> 0x0

Where is your code to check for overflow, as in a bit test of '_P1TOVIF PSMC1INT,3'? As I see it you can start and stop your counter, but what code do you have to catch the counter overflow? Is it an ISR? Does not need to be.

I looked at your code closely and could not find a bit test condition check. Obviously this 16 bit counter does not do more than stay at zero. There is no hardware to auto-reload the counter that I could see.

Unless we are missing something you need to poll for the overflow flag or have that flag trigger an ISR to reload the counter.