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This shows the common power connections, and how the gate inputs and outputs tie together, including the driving-multiple-input fanout connections. Conveniently, this circuit includes LEDs to show the state of sum and carry. That’s another thing that gates can do: provide current to drive stuff. Gates with high drive are called buffers and can drive a larger number of loads than normal gates. But here the normal drive is enough for an LED.

This shows the common power connections, and how the gate inputs and outputs tie together, including the driving-multiple-input fanout connections. 

Conveniently, this circuit includes LEDs to show the state of sum and carry. That’s another thing that gates can do: provide current to drive stuff. Gates with high drive are called buffers and can drive a larger number of loads than normal gates. But here the normal drive is enough for an LED.

This shows the common power connections, and how the gate inputs and outputs tie together, including the driving-multiple-input fanout connections. The 7486, 7408 and 7432 are quad XOR, AND and OR gates, respectively. Below are detailed pinout diagrams for each:

One final note: 74 series bipolar TTL logic (74xx, 74LSxx, 74Sxx, 74Fxx) defines an unconnected input as a logic '1'. This does not work for CMOS gate logic types (74Cxx, 74LVCxx), which require all inputs, used or unused, to be tied to 0 (GND) or 1 (+5V / VCC.)

This shows the common power connections, and how the gate inputs and outputs tie together, including the driving-multiple-input fanout connections. Conveniently, this circuit includes LEDs to show the state of sum and carry. That’s another thing that gates can do: provide current to drive stuff. Gates with high drive are called buffers and can drive a larger number of loads than normal gates. But here the normal drive is enough for an LED.

The 7486, 7408 and 7432 are quad XOR, AND and OR gates, respectively. Below are detailed pinout diagrams for each:

One final note: 74 series bipolar TTL logic (74xx, 74LSxx, 74Sxx, 74Fxx) defines an unconnected input as a logic '1'. This does not work for CMOS gate logic types (74Cxx, 74LVCxx), which require all inputs to be tied either to a driving signal, to 0 (GND) or to 1 (+5V / VCC.)

So you have two 0/5V inputs that map to two 0/5V outputs, sum and carry that you will see below.

You have three 0/5V inputs a, b and c that map to two 0/5V outputs, sum and carry that you will see below.