The transceivers are potentially capable of stronger drive than the processor.
However, the transceivers will have increased propagation delay compared to the mux.
On the other hand, the mux introduces additional capacitance and resistance which (in my opinion) is more likely to become a problem before the latency of the mux does.
But the mux is a single-chip solution whereas the transceiver is two. Since this is an SPI bus that does not require a transceiver IC (like RS-232, RS-422, or RS-485) then the fact the mux is single-chip solution probably wins out.
For interfaces that do require a ruggedized transceiver IC anyways (like RS-232, you are better off with a second transceiver since you end up with a twoRS-chip solution either way. You also422, or RS-485) you do not want to use a mux if you can help it because you are unlikely to find a mux with interfaces that have ruggedizedis just as rugged as the transceivers (ESDi.e. ESD protection, fault protection, high common mode voltage-mode tolerance, etc) since the. Not to mention that if a transceiver IC is needed anyways, you are unlikelyend up with two ICs either way (either transceiver+mux or transceiver+transceiver) so there is no chip count advantage to findgoing with a mux that is just as ruggedin this case.