There are two basic considerations when solving this problem:

The first consideration is to expand the maximum voltage drop across the load aka "compliance voltage of the output current source". It is determined by the supply voltage of the transistor stage minus the voltage drop across the current-setting resistor. If the DAC directly controls the second current source (the OP's idea), this voltage would be only VDAC = 1.25 V while in the original 2-opamp circuit solution it is expanded up to PVDD - VRSNS.

The trick with a current mirror is widely used in the internal op-amp topologies while in the more conventional descrete circuitry it was implemented by cascading n-p-n and p-n-p transistors. BTW, in the case of the OP's configuration, the compliance voltage can be increased simply by amplifying the DAC output voltage so that to approach PVDD but this is a too straightforward solution.

The second consideration is to keep the output current directly proportional to the DAC output voltage. With this purpose, in the 2-opamp solution, they have changed the DAC output reference point from ground to PVDD (as if the DAC output is "turned upside down").

If the DAC directly controlled the second current source (the OP's idea), the output current would be a complementary current. So, to take the right current, you should load a complementary code to the DAC input.

There are two basic considerations when solving this problem:

The first consideration is to expand the maximum voltage drop across the load aka "compliance voltage of the output current source". It is determined by the supply voltage of the transistor stage minus the voltage drop across the current-setting resistor. If the DAC directly controls the second current source (the OP's idea), this voltage would be only VDAC = 1.25 V while in the original 2-opamp circuit solution it is expanded up to PVDD - VRSNS.

The trick with a current mirror is widely used in the internal op-amp topologies while in the more conventional descrete circuitry it was implemented by cascading n-p-n and p-n-p transistors. BTW, in the case of the OP's configuration, the compliance voltage can be increased simply by amplifying the DAC output voltage so that to approach PVDD but this is a too straightforward solution.

The second consideration is to keep the output current directly proportional to the DAC output voltage. With this purpose, in the 2-opamp solution, they have changed the DAC output reference point from ground to PVDD (as if the DAC output is "turned upside down").

If the DAC directly controlled the second current source (the OP's idea), the output current would be a complementary current. So, to take the right current, you should load a complementary code to the DAC input.

There are two basic considerations when solving this problem:

The first consideration is to expand the maximum voltage drop across the load aka "compliance voltage of the output current source". It is determined by the supply voltage of the transistor stage minus the voltage drop across the current-setting resistor. If the DAC directly controls the second current source (the OP's idea), this voltage would be only VDAC = 1.25 V while in the original 2-opamp circuit solution it is expanded up to PVDD - VRSNS.

The trick with a current mirror is widely used in the internal op-amp topologies while in the more conventional descrete circuitry it was implemented by cascading n-p-n and p-n-p transistors. BTW the compliance voltage can be increased simply by amplifying the DAC output voltage so that to approach PVDD but this is a too straightforward solution.

The second consideration is to keep the output current directly proportional to the DAC output voltage. With this purpose, in the 2-opamp solution, they have changed the DAC output reference point from groubd to PVDD (as if the DAC output is "turned upside down").

If the DAC directly controls the second current source (the OP's idea), the output current would be a complementary current. So, to take the right current, you should load a complemebtary code to DAC.

There are two basic considerations when solving this problem:

The first consideration is to expand the maximum voltage drop across the load aka "compliance voltage of the output current source". It is determined by the supply voltage of the transistor stage minus the voltage drop across the current-setting resistor. If the DAC directly controls the second current source (the OP's idea), this voltage would be only VDAC = 1.25 V while in the original 2-opamp circuit solution it is expanded up to PVDD - VRSNS.

The trick with a current mirror is widely used in the internal op-amp topologies while in the more conventional descrete circuitry it was implemented by cascading n-p-n and p-n-p transistors. BTW, in the case of the OP's configuration, the compliance voltage can be increased simply by amplifying the DAC output voltage so that to approach PVDD but this is a too straightforward solution.

The second consideration is to keep the output current directly proportional to the DAC output voltage. With this purpose, in the 2-opamp solution, they have changed the DAC output reference point from ground to PVDD (as if the DAC output is "turned upside down").

If the DAC directly controlled the second current source (the OP's idea), the output current would be a complementary current. So, to take the right current, you should load a complementary code to the DAC input.