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analogsystemsrf
analogsystemsrf
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This IC package will have a LARGE internal metal leadframe.

You can greatly reduce the "enclosed-loop-area" by placing the bypass cap

UNDER

the IC on backside of the PCB.

Imagine the cap is under the center of he IC, with PCB traces running away from the cap to the upper left IC solder pad, and running away from the other cap terminal to the lower left IC solder pad.

These PCB traces will be immediately UNDER the metal structure hidden inside the black epoxy, and the energy_storage loop_area will be greatly reduced, which speeds up the rate of supplying charge into the IC.

================================================

Page 21 of the datasheet has LINK to AppNote. I'd use the layout they suggest

This IC package will have a LARGE internal metal leadframe.

You can greatly reduce the "enclosed-loop-area" by placing the bypass cap

UNDER

the IC on backside of the PCB.

Imagine the cap is under the center of he IC, with PCB traces running away from the cap to the upper left IC solder pad, and running away from the other cap terminal to the lower left IC solder pad.

These PCB traces will be immediately UNDER the metal structure hidden inside the black epoxy, and the energy_storage loop_area will be greatly reduced, which speeds up the rate of supplying charge into the IC.

This IC package will have a LARGE internal metal leadframe.

You can greatly reduce the "enclosed-loop-area" by placing the bypass cap

UNDER

the IC on backside of the PCB.

Imagine the cap is under the center of he IC, with PCB traces running away from the cap to the upper left IC solder pad, and running away from the other cap terminal to the lower left IC solder pad.

These PCB traces will be immediately UNDER the metal structure hidden inside the black epoxy, and the energy_storage loop_area will be greatly reduced, which speeds up the rate of supplying charge into the IC.

================================================

Page 21 of the datasheet has LINK to AppNote. I'd use the layout they suggest

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Source Link
analogsystemsrf
analogsystemsrf
  • 35k
  • 2
  • 20
  • 48

This IC package will have a LARGE internal metal leadframe.

You can greatly reduce the "enclosed-loop-area" by placing the bypass cap

UNDER

the IC on backside of the PCB.

Imagine the cap is under the center of he IC, with PCB traces running away from the cap to the upper left IC solder pad, and running away from the other cap terminal to the lower left IC solder pad.

These PCB traces will be immediately UNDER the metal structure hidden inside the black epoxy, and the energy_storage loop_area will be greatly reduced, which speeds up the rate of supplying charge into the IC.

This IC package will have a LARGE internal metal leadframe.

You can greatly reduce the "enclosed-loop-area" by placing the bypass cap

UNDER

the IC on backside of the PCB.

This IC package will have a LARGE internal metal leadframe.

You can greatly reduce the "enclosed-loop-area" by placing the bypass cap

UNDER

the IC on backside of the PCB.

Imagine the cap is under the center of he IC, with PCB traces running away from the cap to the upper left IC solder pad, and running away from the other cap terminal to the lower left IC solder pad.

These PCB traces will be immediately UNDER the metal structure hidden inside the black epoxy, and the energy_storage loop_area will be greatly reduced, which speeds up the rate of supplying charge into the IC.

Source Link
analogsystemsrf
analogsystemsrf
  • 35k
  • 2
  • 20
  • 48

This IC package will have a LARGE internal metal leadframe.

You can greatly reduce the "enclosed-loop-area" by placing the bypass cap

UNDER

the IC on backside of the PCB.