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Voltage Spike ♦
Voltage Spike ♦
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Would routing through vias be better than top Top layer onlyvs mid layer for high speed ADC signal integrity wise?routing

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JRE
JRE
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Would routing through vias be better than top layer only signal integrity wise?

Assuming we have an analog differential signal trace that we must route from the connector to lets say,say, an ADC, 24 (24 bit or 32 bit kind as i dontI don't think lower resolution ones are not affected by this.) What we would like to happen is to preserve the signal as much as possible so that our ADC can read as accurateaccurately as possible.

I have read that in order for traces to be least likely to be affected by external interferencesinterference it is best to surround the traces by ground planes above, below anand beside. But inIn order to execute this on a pcbPCB (lets not factor external shielding) only we must have a lot of vias.

enter image description here

From what iI know, adding vias adds capacitance which we might not want especially at high frequencies? So. At what frequency do you think 4-6 vias will start being a problem  ? Is 50kHz still in the clear? How Aboutabout 1MHz or 100Mhz100MHz?

At what point do you think that the added EMI protection is not worth it due to signal being affected totoo much by the vias anand the traces should be all be brought back up to the top layer?

Would routing through vias better than top layer only signal integrity wise

Assuming we have an analog differential signal trace that we must route from the connector to lets say an ADC, 24 bit or 32 bit kind as i dont think lower resolution ones are not affected by this. What we would like to happen is to preserve the signal as much as possible so that our ADC can read as accurate as possible.

I have read that in order for traces to be least likely to be affected by external interferences it is best to surround the traces by ground planes above, below an beside. But in order to execute this on a pcb (lets not factor external shielding) only we must have a lot of vias

enter image description here

From what i know adding vias adds capacitance which we might not want especially at high frequencies? So At what frequency do you think 4-6 vias will start being a problem  ? Is 50kHz still in the clear? How About 1MHz or 100Mhz?

At what point do you think that the added EMI protection is not worth due to signal being affected to much by the vias an the traces should be all be brought back up to the top layer?

Would routing through vias be better than top layer only signal integrity wise?

Assuming we have an analog differential signal trace that we must route from the connector to,say, an ADC (24 bit or 32 bit kind as I don't think lower resolution ones are affected by this.) What we would like to happen is to preserve the signal as much as possible so that our ADC can read as accurately as possible.

I have read that in order for traces to be least likely to be affected by external interference it is best to surround the traces by ground planes above, below and beside. In order to execute this on a PCB (lets not factor external shielding) we must have a lot of vias.

enter image description here

From what I know, adding vias adds capacitance which we might not want especially at high frequencies. At what frequency do you think 4-6 vias will start being a problem? Is 50kHz still in the clear? How about 1MHz or 100MHz?

At what point do you think that the added EMI protection is not worth it due to signal being affected too much by the vias and the traces should be all be brought back up to the top layer?

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DrakeJest
DrakeJest
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Would routing through vias better than top layer only signal integrity wise

Assuming we have an analog differential signal trace that we must route from the connector to lets say an ADC, 24 bit or 32 bit kind as i dont think lower resolution ones are not affected by this. What we would like to happen is to preserve the signal as much as possible so that our ADC can read as accurate as possible.

I have read that in order for traces to be least likely to be affected by external interferences it is best to surround the traces by ground planes above, below an beside. But in order to execute this on a pcb (lets not factor external shielding) only we must have a lot of vias

enter image description here

From what i know adding vias adds capacitance which we might not want especially at high frequencies? So At what frequency do you think 4-6 vias will start being a problem ? Is 50kHz still in the clear? How About 1MHz or 100Mhz?

At what point do you think that the added EMI protection is not worth due to signal being affected to much by the vias an the traces should be all be brought back up to the top layer?