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Dec 21, 2021 at 0:01 vote accept user267839
Dec 17, 2021 at 6:37 comment added Andy aka I will also add that rahsoft says this: The matching network is always designed using the reactive elements like inductance, and capacitance (L and C). The matching network never includes resistance, as it absorbs the average power - that is rather naïve. Plenty of times we use a taper pad (attenuating impedance matching network) so, I take issue with the word always used in the above sentence. Neither do I like the way they said that capacitive reactance is 1/jcw. The terms "j" and "w" are so closely linked that it is very naïve not to refer to capacitive reactance as "1/jwC".
Dec 17, 2021 at 6:22 comment added Andy aka @user7391733 wouldn't it not have been easier to align the modelings of Zout with those suggested in rahsoft.com - does that matter now? I showed 3 different ways to solve it and rahsoft shows one way. So now, in total you have four methods and, there's probably more to find. Anyway, in the first line of rahsoft it says this: Maximum power delivery is the main objective while designing a circuit in RF systems - I considered that was a rather weak stance to take and, it put me off analysing their page in detail - it's the reduction of standing waves that is most important IMHO.
Dec 17, 2021 at 6:10 comment added Andy aka @user7391733 (1) In the simulation, the measurement of the impedance presented to V1 (by components C1, L1 and R1) it makes use of R2 (as a convenient placeholder) to help analysis. (2) So, if you look at the graphical AC analysis result, I plot the voltage Vx divided by the current through R2 in the top graph (v(Vx)/i(R2). (3) Because that top graph is a magnitude bode plot it ignores phase relationship and works with amplitude magnitude (as with any bode plot response). (4) The lower part is the phase response and, it works with the phase angle result of i(R2).
Dec 17, 2021 at 6:03 comment added Andy aka @user7391733 (1) The input impedance of a port is unrelated to any voltage source that is present and connected to another port. (2) So, the connected voltage source \$V_S\$ could be 1 MHz @ 10 volts or (for example), 10 mV @ 1 Hz or DC of any value. (3) This gives us the freedom to make the voltage source whatever value and frequency we wish in order to find the impedance of another port. (4) For convenience, I choose 0 volts for \$V_S\$.
Dec 17, 2021 at 0:04 comment added user267839 why do you think that it's possible for the calculations to short source \$ V_S \$ in your simulation circuit from Addendum 1? and why you introduce the voltage \$ V_1 \$ on the load side? wouldn't it not have been easier to align the modelings of \$ Z_{out} \$ with those suggested in rahsoft.com/2021/04/13/… and based on this, carry out the calculations?
Dec 11, 2021 at 5:19 comment added Andy aka Well I did finally give you a proof above and yes, it is a redundant step. If we are done here you should accept my answer formally.
Dec 11, 2021 at 2:30 comment added user267839 moreover in your last comment where you wrote that if we succed to obtain Zin = Zsource, then the only component that can dissipate this is the resistive load on the output, do you refer to the implication that the attempt to try in addition to obtain Zout= Zload is a redundant step?
Dec 11, 2021 at 2:23 comment added user267839 I really appreciate your effort to try to help me to solve the problems but yes the determination of \$Z_{out} \$ as stated in my partial question B. is one of the most important parts I originally asked for. in addendum above in my question I explained what you have explained and what is in my opinion missing.
Dec 9, 2021 at 15:00 history edited Andy aka CC BY-SA 4.0
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Dec 9, 2021 at 14:02 history edited Andy aka CC BY-SA 4.0
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Dec 9, 2021 at 13:55 history edited Andy aka CC BY-SA 4.0
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Dec 9, 2021 at 12:27 history edited Andy aka CC BY-SA 4.0
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Dec 9, 2021 at 4:46 comment added Andy aka I've clearly demonstrated that Zo is resistive. I've also explained that if Zin is resistive and equal to Zsource (which it is) then power must be taken from the source at the correct ratio and, the only component that can dissipate this is the resistive load on the output. So, are you genuinely truly having problems accepting that despite what I say? Does your original question totally boil down to proving the output resistance value? Think carefully here.
Dec 9, 2021 at 3:21 comment added user267839 and yes as I already said I know how to calculate \$Z_{in}\$. My concern relates to \$Z_{out}\$, see also rahsoft.com/2021/04/13/… what I mean by \$Z_{out}\$. and ok, if you don't like mathematical explanations, could you at least explain it more conceptionally how to obtain this \$Z_{out}\$ from the impedances of the source and components of the L-matching network. can it be obtained by a sequence of transformations replacing it by an Theverin equivalent circuit? the main cause of the problem is surely the capacitor...
Dec 9, 2021 at 3:09 comment added user267839 note that my penultimate comment contains some copy & paste typos: I wanted to say there: that's the same story as for \$Z_{in}\$: the equation \$Z_{in}= Z_{S}^*\$ is not (!!!) a definition, it's a condition which should be satisfied by \$Z_{in}\$ as a function depending on \$X_{C}\$ and \$X_{I}\$, the formula which you derived on you website. and my question is about \$Z_{out}\$: how this dependence of \$Z_{out}\$ on \$X_{C}\$ and \$X_{I}\$ is expressed as explicit formula?
Dec 5, 2021 at 11:25 comment added Andy aka Just for you @user7391733 I've simulated the 50 ohm input, 300 ohm output impedance scenario at 10 MHz - see addendum to my answer.
Dec 5, 2021 at 11:24 history edited Andy aka CC BY-SA 4.0
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Dec 5, 2021 at 10:44 comment added Andy aka So then, the impedance looking into your 2nd picture under "B" is \$\dfrac{1}{j\omega C}\$ in parallel with \$j\omega L + R_{SOURCE}\$.
Dec 5, 2021 at 9:37 comment added Andy aka This isn't a progressive teaching forum where solutions are hammered out over many interactive comments; this is a Q and A site. I suggest you get hold of a simulator, plug-in some values implied by my formula and see for yourself that the input and output impedances are absolutely correct (which of course they are). As to "Q: how to deal with Vs?" - Vs is just shorted out in order to compute Zout/Rout. It's fairly trivial really. It's based on superposition.
Dec 4, 2021 at 23:32 comment added user267839 I updated again the graphic below my question B. by a third picture to clarify what I mean. perhaps this makes my concern better understandable.
Dec 4, 2021 at 23:08 comment added user267839 that's the same story as for \$ Z_{in} \$. the equation \$ Z_{out} = Z_S^*\$ is not a definition, it's a condition which should be satisfied by \$ Z_{out}\$ as a function depending on \$ X_C \$ and \$ X_I \$, the formula which you derived on you website. and my question is about \$ Z_{out} \$: how this dependence of \$ Z_{out} \$ on \$ X_C \$ and \$ X_I \$ is expressed as explicit formula?
Dec 4, 2021 at 23:08 comment added user267839 perhaps it becomes clearer what I mean by \$ Z_{out} \$ considering the fourth picture here: rahsoft.com/2021/04/13/… In our case since we are working with resistive source and load we have \$ Z_{L}=R_L \$. but my point is that you can't simply call or define \$ Z_{out} \$ a priori as \$ Z_{L}\$ (or in our case \$ R_{out} = R_{L}\$). That's a nontrivial condition for the parameters \$ X_C \$ and \$ X_I \$ on which \$ Z_{out} \$ a priori depends.
Dec 4, 2021 at 22:28 comment added Andy aka I dont see how you can say that my formula don’t include Rout. I call it RL in my derivations. Do you see that know. I believe the picture in the answer to be fairly clear.
Dec 4, 2021 at 22:26 comment added Andy aka Simply put, if Zin is purely resistive then that power is going somewhere and, that means that the power must be entering the only other resistive component in the circuit, namely Rout. A driver is English for a prime mover or source. Pretty standard language really.
Dec 4, 2021 at 22:19 comment added user267839 the calculation of \$ Z_{in} \$ as you showed is a simple yoga with parallel and serial impedances, the techniques to do it are well known. we calculate at first the impedance of parallel \$ jX_C \$ and \$ Z_S \$ and then add to it \$ jX_I \$ according to calculation rule for impedances in series. it's easy. the calculation of \$ Z_{out} \$ includes the signal generator as well. how should it be treated in calculation of \$ Z_{out} \$? should it be completely ignored?
Dec 4, 2021 at 22:19 comment added user267839 as well there is problem why as I think it becomes rather more difficult to calculate \$ Z_{out} \$ than \$ Z_{in} \$ and why your technique for calculations of cannot \$ Z_{in} \$ be straight forwardly adapted to calculate \$ Z_{out} \$. take a look at the picture I added below question B. to emphasize the problem I have now:
Dec 4, 2021 at 20:58 comment added user267839 what is a 'driver' as technical term in this context? is it used synonymously to 'source'?
Dec 4, 2021 at 20:43 comment added Andy aka I think you need to run with this yourself now. I've shown you the proofs for resistive impedance. Just modify my technique for complex impedance OR, recognize that you can cancel the reactive elements with the opposite value series reactances thus leaving you you with resistive values. This is how you'd match an antenna to a complex driver impedance.
Dec 4, 2021 at 20:37 comment added user267839 Thank you @Andy, that covers the case where the impedances of source and load are real: \$ Z_S = R_S, Z_L=R_L \$ One aspect is not quite evident there. You give a formula for \$ Z_{in} \$, the value of \$ Z_{out} \$ is not involved in your considerations. seemingly because it is not neccessary to determine \$ X_C \$ and \$ X_I \$. Do you nevertheless know how it can be calculated?
Dec 3, 2021 at 14:01 history edited Andy aka CC BY-SA 4.0
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Dec 3, 2021 at 13:39 history answered Andy aka CC BY-SA 4.0