All FETs are defined in datasheets with Vgs=Vds = \$V_{gs_{TH}}\$ a.k.a Vt as the threshold voltage at some tiny current like 100 uA.

This is what your circuit looks like in this question.

^{simulate this circuit – Schematic created using CircuitLab}

Thus your C would charge up to 8.5V = 10V - Vt in milliseconds instead of microseconds.

Due to the square law in reducing RdsOn, for logic level FETs you need 2x Vt and older standard FETs with Vt= 2 to 4V with 2.5 to 3x Vt to achieve rated RdsOn.

All FETs are defined in datasheets with Vgs=Vds = \$V_{gs_{TH}}\$ a.k.a Vt as the threshold voltage at some tiny current like 100 uA.

This is what your circuit looks like in this question.

^{simulate this circuit – Schematic created using CircuitLab}

Thus your C would charge up to 8.5V = 10V - Vt in milliseconds instead of microseconds.

Due to the square law in reducing RdsOn, for logic level FETs you need 2x Vt and older standard FETs with Vt= 2 to 4V with 2.5 to 3x Vt to achieve rated RdsOn.