Timeline for Three-state buffer SPI termination requirements
Current License: CC BY-SA 4.0
14 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Jul 20, 2022 at 18:24 | history | edited | Shahreza | CC BY-SA 4.0 |
added 291 characters in body
|
| Jul 20, 2022 at 14:58 | vote | accept | Shahreza | ||
| Jul 20, 2022 at 13:44 | history | edited | Shahreza | CC BY-SA 4.0 |
added 11 characters in body; edited body
|
| Jul 20, 2022 at 13:36 | comment | added | Shahreza | @TonyM I am using 74LVC126 | |
| Jul 20, 2022 at 10:44 | history | edited | TonyM | CC BY-SA 4.0 |
Spelling and grammar.
|
| Jul 20, 2022 at 8:06 | history | edited | TonyM | CC BY-SA 4.0 |
Spelling and grammar.
|
| Jul 20, 2022 at 8:04 | comment | added | TonyM | Can you edit your question and add the 3-state buffer part number. Are these buffers or just voltage translators? Thanks. | |
| Jul 20, 2022 at 5:08 | history | edited | Shahreza | CC BY-SA 4.0 |
edited body
|
| Jul 20, 2022 at 3:27 | answer | added | Jens | timeline score: 2 | |
| Jul 20, 2022 at 2:54 | history | edited | Shahreza | CC BY-SA 4.0 |
added 2 characters in body
|
| Jul 20, 2022 at 2:33 | history | edited | Shahreza | CC BY-SA 4.0 |
added 19 characters in body; added 17 characters in body
|
| Jul 20, 2022 at 2:28 | comment | added | Shahreza | @Jens yes it does I didnt show in schematic, I only show that all of is enable( I will go head and added) | |
| Jul 20, 2022 at 2:27 | comment | added | Jens | Why do you use 3 state buffers at all? Your circuit does not contain any 3 state control logic (OE) anyway. | |
| Jul 20, 2022 at 0:38 | history | asked | Shahreza | CC BY-SA 4.0 |